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authorMichael Sevakis <jethead71@rockbox.org>2007-06-01 01:05:57 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-06-01 01:05:57 +0000
commit13067f6c71b6bdd6fd63a2699a3ee2eae100b2b8 (patch)
tree1a5dac8a2c466addc654ddbe5aa1f876990e8c49
parent70b613236a224069dd0c43bafac578e31e97391b (diff)
downloadrockbox-13067f6c71b6bdd6fd63a2699a3ee2eae100b2b8.tar.gz
rockbox-13067f6c71b6bdd6fd63a2699a3ee2eae100b2b8.zip
e200: Use clocking set up by loader and skip setting the values for now. Change a DMA related register value and leave another alone. Seems to stop the melting screen and gives a speedup especially to video and graphics. If the former isn't quite fixed, the latter definitely works. Please don't enable frequency scaling for now as that will clobber the register values.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13531 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/sandisk/sansa-e200/ata-e200.c2
-rw-r--r--firmware/target/arm/system-pp502x.c16
2 files changed, 15 insertions, 3 deletions
diff --git a/firmware/target/arm/sandisk/sansa-e200/ata-e200.c b/firmware/target/arm/sandisk/sansa-e200/ata-e200.c
index b66984bec4..29fe0d9109 100644
--- a/firmware/target/arm/sandisk/sansa-e200/ata-e200.c
+++ b/firmware/target/arm/sandisk/sansa-e200/ata-e200.c
@@ -363,8 +363,6 @@ void sd_init_device(void)
363 DEV_EN |= DEV_ATA; /* Enable controller */ 363 DEV_EN |= DEV_ATA; /* Enable controller */
364 DEV_RS |= DEV_ATA; /* Reset controller */ 364 DEV_RS |= DEV_ATA; /* Reset controller */
365 DEV_RS &=~DEV_ATA; /* Clear Reset */ 365 DEV_RS &=~DEV_ATA; /* Clear Reset */
366 outl(0, 0x6000b000);
367 outl(0, 0x6000a000); /* Init DMA controller? */
368 366
369/* Init NAND */ 367/* Init NAND */
370 REG_11 |= (1 << 15); 368 REG_11 |= (1 << 15);
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index 1f2d27a7b7..a03d479444 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -194,6 +194,8 @@ void set_cpu_frequency(long frequency)
194#elif !defined(BOOTLOADER) 194#elif !defined(BOOTLOADER)
195void ipod_set_cpu_frequency(void) 195void ipod_set_cpu_frequency(void)
196{ 196{
197/* For e200, just use clocking set up by OF loader for now */
198#ifndef SANSA_E200
197 /* Enable PLL? */ 199 /* Enable PLL? */
198 outl(inl(0x70000020) | (1<<30), 0x70000020); 200 outl(inl(0x70000020) | (1<<30), 0x70000020);
199 201
@@ -207,6 +209,7 @@ void ipod_set_cpu_frequency(void)
207 209
208 /* Select PLL as clock source? */ 210 /* Select PLL as clock source? */
209 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); 211 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
212#endif /* SANSA_E200 */
210} 213}
211#endif 214#endif
212 215
@@ -252,6 +255,14 @@ void system_init(void)
252 GPIOK_INT_EN = 0; 255 GPIOK_INT_EN = 0;
253 GPIOL_INT_EN = 0; 256 GPIOL_INT_EN = 0;
254 257
258#ifdef SANSA_E200
259 /* outl(0x00000000, 0x6000b000); */
260 outl(inl(0x6000a000) | 0x80000000, 0x6000a000); /* Init DMA controller? */
261 }
262
263 ipod_init_cache();
264#else /* !sansa E200 */
265
255# if NUM_CORES > 1 && defined(HAVE_ADJUSTABLE_CPU_FREQ) 266# if NUM_CORES > 1 && defined(HAVE_ADJUSTABLE_CPU_FREQ)
256 spinlock_init(&boostctrl_mtx); 267 spinlock_init(&boostctrl_mtx);
257# endif 268# endif
@@ -267,7 +278,10 @@ void system_init(void)
267 } 278 }
268#endif 279#endif
269 ipod_init_cache(); 280 ipod_init_cache();
270#endif 281
282#endif /* SANSA_E200 */
283
284#endif /* BOOTLOADER */
271} 285}
272 286
273void system_reboot(void) 287void system_reboot(void)