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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-05-21 12:29:51 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2009-05-21 12:29:51 +0000
commit0e725551af7c4b337aebcb8d922dba34cbb20565 (patch)
treee920e6b3cdeb218938e90f78e73319268499c621
parent0f93ae5da0de8671521d9cd1cc532591fc0b6a91 (diff)
downloadrockbox-0e725551af7c4b337aebcb8d922dba34cbb20565.tar.gz
rockbox-0e725551af7c4b337aebcb8d922dba34cbb20565.zip
Replace some TABs with spaces (no functional changes)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21009 a1c6a512-1295-4272-9138-f99709370657
Diffstat
-rw-r--r--firmware/target/mips/ingenic_jz47xx/debug-jz4740.c158
1 files changed, 79 insertions, 79 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/debug-jz4740.c b/firmware/target/mips/ingenic_jz47xx/debug-jz4740.c
index 9d61c0931b..07b3802bf2 100644
--- a/firmware/target/mips/ingenic_jz47xx/debug-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/debug-jz4740.c
@@ -54,93 +54,93 @@ static void printf(const char *format, ...)
54 54
55static void display_clocks(void) 55static void display_clocks(void)
56{ 56{
57 unsigned int cppcr = REG_CPM_CPPCR; /* PLL Control Register */ 57 unsigned int cppcr = REG_CPM_CPPCR; /* PLL Control Register */
58 unsigned int cpccr = REG_CPM_CPCCR; /* Clock Control Register */ 58 unsigned int cpccr = REG_CPM_CPCCR; /* Clock Control Register */
59 unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; 59 unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
60 unsigned int od[4] = {1, 2, 2, 4}; 60 unsigned int od[4] = {1, 2, 2, 4};
61 61
62 printf("CPPCR : 0x%08x", cppcr); 62 printf("CPPCR : 0x%08x", cppcr);
63 printf("CPCCR : 0x%08x", cpccr); 63 printf("CPCCR : 0x%08x", cpccr);
64 printf("PLL : %s", (cppcr & CPM_CPPCR_PLLEN) ? "ON" : "OFF"); 64 printf("PLL : %s", (cppcr & CPM_CPPCR_PLLEN) ? "ON" : "OFF");
65 printf("m:n:o : %d:%d:%d", 65 printf("m:n:o : %d:%d:%d",
66 __cpm_get_pllm() + 2, 66 __cpm_get_pllm() + 2,
67 __cpm_get_plln() + 2, 67 __cpm_get_plln() + 2,
68 od[__cpm_get_pllod()] 68 od[__cpm_get_pllod()]
69 ); 69 );
70 printf("C:H:M:P : %d:%d:%d:%d", 70 printf("C:H:M:P : %d:%d:%d:%d",
71 div[__cpm_get_cdiv()], 71 div[__cpm_get_cdiv()],
72 div[__cpm_get_hdiv()], 72 div[__cpm_get_hdiv()],
73 div[__cpm_get_mdiv()], 73 div[__cpm_get_mdiv()],
74 div[__cpm_get_pdiv()] 74 div[__cpm_get_pdiv()]
75 ); 75 );
76 printf("U:L:I:P:M : %d:%d:%d:%d:%d", 76 printf("U:L:I:P:M : %d:%d:%d:%d:%d",
77 __cpm_get_udiv() + 1, 77 __cpm_get_udiv() + 1,
78 __cpm_get_ldiv() + 1, 78 __cpm_get_ldiv() + 1,
79 __cpm_get_i2sdiv()+1, 79 __cpm_get_i2sdiv()+1,
80 __cpm_get_pixdiv()+1, 80 __cpm_get_pixdiv()+1,
81 __cpm_get_mscdiv()+1 81 __cpm_get_mscdiv()+1
82 ); 82 );
83 printf("PLL Freq: %3d.%02d MHz", TO_MHZ(__cpm_get_pllout())); 83 printf("PLL Freq: %3d.%02d MHz", TO_MHZ(__cpm_get_pllout()));
84 printf("CCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_cclk())); 84 printf("CCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_cclk()));
85 printf("HCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_hclk())); 85 printf("HCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_hclk()));
86 printf("MCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_mclk())); 86 printf("MCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_mclk()));
87 printf("PCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_pclk())); 87 printf("PCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_pclk()));
88 printf("LCDCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_lcdclk())); 88 printf("LCDCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_lcdclk()));
89 printf("PIXCLK : %6d.%02d KHz", TO_KHZ(__cpm_get_pixclk())); 89 printf("PIXCLK : %6d.%02d KHz", TO_KHZ(__cpm_get_pixclk()));
90 printf("I2SCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_i2sclk())); 90 printf("I2SCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_i2sclk()));
91 printf("USBCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_usbclk())); 91 printf("USBCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_usbclk()));
92 printf("MSCCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_mscclk())); 92 printf("MSCCLK : %3d.%02d MHz", TO_MHZ(__cpm_get_mscclk()));
93 printf("EXTALCLK: %3d.%02d MHz", TO_MHZ(__cpm_get_extalclk())); 93 printf("EXTALCLK: %3d.%02d MHz", TO_MHZ(__cpm_get_extalclk()));
94 printf("RTCCLK : %3d.%02d KHz", TO_KHZ(__cpm_get_rtcclk())); 94 printf("RTCCLK : %3d.%02d KHz", TO_KHZ(__cpm_get_rtcclk()));
95} 95}
96 96
97static void display_enabled_clocks(void) 97static void display_enabled_clocks(void)
98{ 98{
99 unsigned long lcr = REG_CPM_LCR; 99 unsigned long lcr = REG_CPM_LCR;
100 unsigned long clkgr = REG_CPM_CLKGR; 100 unsigned long clkgr = REG_CPM_CLKGR;
101 101
102 printf("Low Power Mode : %s", 102 printf("Low Power Mode : %s",
103 ((lcr & CPM_LCR_LPM_MASK) == CPM_LCR_LPM_IDLE) ? 103 ((lcr & CPM_LCR_LPM_MASK) == CPM_LCR_LPM_IDLE) ?
104 "IDLE" : (((lcr & CPM_LCR_LPM_MASK) == CPM_LCR_LPM_SLEEP) ? "SLEEP" : "HIBERNATE") 104 "IDLE" : (((lcr & CPM_LCR_LPM_MASK) == CPM_LCR_LPM_SLEEP) ? "SLEEP" : "HIBERNATE")
105 ); 105 );
106 106
107 printf("Doze Mode : %s", 107 printf("Doze Mode : %s",
108 (lcr & CPM_LCR_DOZE_ON) ? "ON" : "OFF"); 108 (lcr & CPM_LCR_DOZE_ON) ? "ON" : "OFF");
109 if (lcr & CPM_LCR_DOZE_ON) 109 if (lcr & CPM_LCR_DOZE_ON)
110 printf(" duty : %d", (int)((lcr & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT)); 110 printf(" duty : %d", (int)((lcr & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT));
111 111
112 printf("IPU : %s", 112 printf("IPU : %s",
113 (clkgr & CPM_CLKGR_IPU) ? "stopped" : "running"); 113 (clkgr & CPM_CLKGR_IPU) ? "stopped" : "running");
114 printf("DMAC : %s", 114 printf("DMAC : %s",
115 (clkgr & CPM_CLKGR_DMAC) ? "stopped" : "running"); 115 (clkgr & CPM_CLKGR_DMAC) ? "stopped" : "running");
116 printf("UHC : %s", 116 printf("UHC : %s",
117 (clkgr & CPM_CLKGR_UHC) ? "stopped" : "running"); 117 (clkgr & CPM_CLKGR_UHC) ? "stopped" : "running");
118 printf("UDC : %s", 118 printf("UDC : %s",
119 (clkgr & CPM_CLKGR_UDC) ? "stopped" : "running"); 119 (clkgr & CPM_CLKGR_UDC) ? "stopped" : "running");
120 printf("LCD : %s", 120 printf("LCD : %s",
121 (clkgr & CPM_CLKGR_LCD) ? "stopped" : "running"); 121 (clkgr & CPM_CLKGR_LCD) ? "stopped" : "running");
122 printf("CIM : %s", 122 printf("CIM : %s",
123 (clkgr & CPM_CLKGR_CIM) ? "stopped" : "running"); 123 (clkgr & CPM_CLKGR_CIM) ? "stopped" : "running");
124 printf("SADC : %s", 124 printf("SADC : %s",
125 (clkgr & CPM_CLKGR_SADC) ? "stopped" : "running"); 125 (clkgr & CPM_CLKGR_SADC) ? "stopped" : "running");
126 printf("MSC : %s", 126 printf("MSC : %s",
127 (clkgr & CPM_CLKGR_MSC) ? "stopped" : "running"); 127 (clkgr & CPM_CLKGR_MSC) ? "stopped" : "running");
128 printf("AIC1 : %s", 128 printf("AIC1 : %s",
129 (clkgr & CPM_CLKGR_AIC1) ? "stopped" : "running"); 129 (clkgr & CPM_CLKGR_AIC1) ? "stopped" : "running");
130 printf("AIC2 : %s", 130 printf("AIC2 : %s",
131 (clkgr & CPM_CLKGR_AIC2) ? "stopped" : "running"); 131 (clkgr & CPM_CLKGR_AIC2) ? "stopped" : "running");
132 printf("SSI : %s", 132 printf("SSI : %s",
133 (clkgr & CPM_CLKGR_SSI) ? "stopped" : "running"); 133 (clkgr & CPM_CLKGR_SSI) ? "stopped" : "running");
134 printf("I2C : %s", 134 printf("I2C : %s",
135 (clkgr & CPM_CLKGR_I2C) ? "stopped" : "running"); 135 (clkgr & CPM_CLKGR_I2C) ? "stopped" : "running");
136 printf("RTC : %s", 136 printf("RTC : %s",
137 (clkgr & CPM_CLKGR_RTC) ? "stopped" : "running"); 137 (clkgr & CPM_CLKGR_RTC) ? "stopped" : "running");
138 printf("TCU : %s", 138 printf("TCU : %s",
139 (clkgr & CPM_CLKGR_TCU) ? "stopped" : "running"); 139 (clkgr & CPM_CLKGR_TCU) ? "stopped" : "running");
140 printf("UART1 : %s", 140 printf("UART1 : %s",
141 (clkgr & CPM_CLKGR_UART1) ? "stopped" : "running"); 141 (clkgr & CPM_CLKGR_UART1) ? "stopped" : "running");
142 printf("UART0 : %s", 142 printf("UART0 : %s",
143 (clkgr & CPM_CLKGR_UART0) ? "stopped" : "running"); 143 (clkgr & CPM_CLKGR_UART0) ? "stopped" : "running");
144} 144}
145 145
146bool __dbg_ports(void) 146bool __dbg_ports(void)
@@ -155,7 +155,7 @@ bool __dbg_hw_info(void)
155 int touch; 155 int touch;
156#endif 156#endif
157 struct tm *cur_time; 157 struct tm *cur_time;
158 158
159 lcd_setfont(FONT_SYSFIXED); 159 lcd_setfont(FONT_SYSFIXED);
160 while(btn ^ BUTTON_POWER) 160 while(btn ^ BUTTON_POWER)
161 { 161 {
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-22 15:23:19 +0000