diff options
author | Thomas Martitz <kugel@rockbox.org> | 2009-07-12 09:43:44 +0000 |
---|---|---|
committer | Thomas Martitz <kugel@rockbox.org> | 2009-07-12 09:43:44 +0000 |
commit | 0dd0e4e0728d07a3ef50ee60a47b5ca54c5ef298 (patch) | |
tree | 31fcdae43352bd5a5457f867edef66cdd02dd387 | |
parent | 467999ac9c605faafa7fe9e01322acf901e1da64 (diff) | |
download | rockbox-0dd0e4e0728d07a3ef50ee60a47b5ca54c5ef298.tar.gz rockbox-0dd0e4e0728d07a3ef50ee60a47b5ca54c5ef298.zip |
Correct svn:keywords and svn:eol-style on a few more files.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21798 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/audio/mas35xx.c | 2 | ||||
-rw-r--r-- | firmware/drivers/m66591.c | 2 | ||||
-rw-r--r-- | firmware/drivers/ramdisk.c | 2 | ||||
-rw-r--r-- | firmware/drivers/rtc/rtc_as3514.c | 2 | ||||
-rw-r--r-- | firmware/drivers/rtc/rtc_rx5x348ab.c | 2 | ||||
-rw-r--r-- | firmware/drivers/tsc2100.c | 2 | ||||
-rw-r--r-- | firmware/export/as3525.h | 2 | ||||
-rw-r--r-- | firmware/export/iap.h | 2 | ||||
-rw-r--r-- | firmware/export/isp1583.h | 354 | ||||
-rw-r--r-- | firmware/export/m66591.h | 2 | ||||
-rw-r--r-- | firmware/export/nand_id.h | 2 | ||||
-rw-r--r-- | firmware/export/s5l8700.h | 2 | ||||
-rw-r--r-- | firmware/export/spi.h | 2 | ||||
-rw-r--r-- | firmware/export/tsc2100.h | 2 |
14 files changed, 190 insertions, 190 deletions
diff --git a/firmware/drivers/audio/mas35xx.c b/firmware/drivers/audio/mas35xx.c index d1efe4b2e6..ae94cbacf0 100644 --- a/firmware/drivers/audio/mas35xx.c +++ b/firmware/drivers/audio/mas35xx.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: wm8975.c 13453 2007-05-20 23:10:15Z christian $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Driver for MAS35xx audio codec | 10 | * Driver for MAS35xx audio codec |
11 | * | 11 | * |
diff --git a/firmware/drivers/m66591.c b/firmware/drivers/m66591.c index 4c1773e61b..5b3c4e1035 100644 --- a/firmware/drivers/m66591.c +++ b/firmware/drivers/m66591.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: usb-mr500.c 18487 2008-09-10 20:14:22Z bertrik $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2009 by Karl Kurbjun | 10 | * Copyright (C) 2009 by Karl Kurbjun |
11 | * Portions Copyright (C) 2007 by Catalin Patulea | 11 | * Portions Copyright (C) 2007 by Catalin Patulea |
diff --git a/firmware/drivers/ramdisk.c b/firmware/drivers/ramdisk.c index 266d3ea225..c16c4fb675 100644 --- a/firmware/drivers/ramdisk.c +++ b/firmware/drivers/ramdisk.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: ramdisk.c 18965 2008-11-01 17:33:21Z gevaerts $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2008 Frank Gevaerts | 10 | * Copyright (C) 2008 Frank Gevaerts |
11 | * | 11 | * |
diff --git a/firmware/drivers/rtc/rtc_as3514.c b/firmware/drivers/rtc/rtc_as3514.c index d20e021ffb..d0c4cd7c17 100644 --- a/firmware/drivers/rtc/rtc_as3514.c +++ b/firmware/drivers/rtc/rtc_as3514.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: rtc_as3514.c 12131 2007-01-27 20:48:48Z dan_a $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Barry Wardell | 10 | * Copyright (C) 2007 by Barry Wardell |
11 | * | 11 | * |
diff --git a/firmware/drivers/rtc/rtc_rx5x348ab.c b/firmware/drivers/rtc/rtc_rx5x348ab.c index 218582c8fa..331b2d6cb8 100644 --- a/firmware/drivers/rtc/rtc_rx5x348ab.c +++ b/firmware/drivers/rtc/rtc_rx5x348ab.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: rtc_as3514.c 12131 2007-01-27 20:48:48Z dan_a $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Jonathan Gordon | 10 | * Copyright (C) 2007 by Jonathan Gordon |
11 | * | 11 | * |
diff --git a/firmware/drivers/tsc2100.c b/firmware/drivers/tsc2100.c index 32a3516e9d..09017996dc 100644 --- a/firmware/drivers/tsc2100.c +++ b/firmware/drivers/tsc2100.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Jonathan Gordon | 10 | * Copyright (C) 2007 by Jonathan Gordon |
11 | * | 11 | * |
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index b7da19320d..cf8d11ba05 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h | |||
@@ -114,7 +114,7 @@ | |||
114 | #define DBOP_TIMPOL_23 (*(volatile unsigned long *)(DBOP_BASE + 0x04)) | 114 | #define DBOP_TIMPOL_23 (*(volatile unsigned long *)(DBOP_BASE + 0x04)) |
115 | #define DBOP_CTRL (*(volatile unsigned long *)(DBOP_BASE + 0x08)) | 115 | #define DBOP_CTRL (*(volatile unsigned long *)(DBOP_BASE + 0x08)) |
116 | #define DBOP_STAT (*(volatile unsigned long *)(DBOP_BASE + 0x0C)) | 116 | #define DBOP_STAT (*(volatile unsigned long *)(DBOP_BASE + 0x0C)) |
117 | #define DBOP_DOUT (*(volatile unsigned short*)(DBOP_BASE + 0x10)) | 117 | #define DBOP_DOUT (*(volatile unsigned short *)(DBOP_BASE + 0x10)) |
118 | #define DBOP_DIN (*(volatile unsigned short*)(DBOP_BASE + 0x14)) | 118 | #define DBOP_DIN (*(volatile unsigned short*)(DBOP_BASE + 0x14)) |
119 | 119 | ||
120 | 120 | ||
diff --git a/firmware/export/iap.h b/firmware/export/iap.h index d3afd6ba04..e945d0c979 100644 --- a/firmware/export/iap.h +++ b/firmware/export/iap.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: iap.h 17400 2008-05-07 20:22:16Z xxxxxx $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2002 by Alan Korr | 10 | * Copyright (C) 2002 by Alan Korr |
11 | * | 11 | * |
diff --git a/firmware/export/isp1583.h b/firmware/export/isp1583.h index 0bdbba886c..61ea4b83cc 100644 --- a/firmware/export/isp1583.h +++ b/firmware/export/isp1583.h | |||
@@ -1,181 +1,181 @@ | |||
1 | /*************************************************************************** | 1 | /*************************************************************************** |
2 | * __________ __ ___. | 2 | * __________ __ ___. |
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | 3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ |
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | 4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / |
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id$ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2008 by Maurus Cuelenaere | 10 | * Copyright (C) 2008 by Maurus Cuelenaere |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or | 12 | * This program is free software; you can redistribute it and/or |
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version 2 | 14 | * as published by the Free Software Foundation; either version 2 |
15 | * of the License, or (at your option) any later version. | 15 | * of the License, or (at your option) any later version. |
16 | * | 16 | * |
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | 17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY |
18 | * KIND, either express or implied. | 18 | * KIND, either express or implied. |
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #ifndef ISP1583_H | 21 | #ifndef ISP1583_H |
22 | #define ISP1583_H | 22 | #define ISP1583_H |
23 | 23 | ||
24 | #include "usb-target.h" | 24 | #include "usb-target.h" |
25 | 25 | ||
26 | #ifndef ISP1583_H_OVERRIDE | 26 | #ifndef ISP1583_H_OVERRIDE |
27 | /* Initialization registers */ | 27 | /* Initialization registers */ |
28 | #define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) | 28 | #define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) |
29 | #define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC))) | 29 | #define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC))) |
30 | #define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10))) | 30 | #define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10))) |
31 | #define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12))) | 31 | #define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12))) |
32 | #define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14))) | 32 | #define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14))) |
33 | #define ISP1583_INIT_INTEN_B | 33 | #define ISP1583_INIT_INTEN_B |
34 | #define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A | 34 | #define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A |
35 | /* Data Flow registers */ | 35 | /* Data Flow registers */ |
36 | #define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2))) | 36 | #define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2))) |
37 | #define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28))) | 37 | #define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28))) |
38 | #define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20))) | 38 | #define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20))) |
39 | #define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C))) | 39 | #define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C))) |
40 | #define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E))) | 40 | #define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E))) |
41 | #define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04))) | 41 | #define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04))) |
42 | #define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08))) | 42 | #define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08))) |
43 | /* DMA registers */ | 43 | /* DMA registers */ |
44 | #define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58))) | 44 | #define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58))) |
45 | /* General registers */ | 45 | /* General registers */ |
46 | #define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18))) | 46 | #define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18))) |
47 | #define ISP1583_GEN_INT_B | 47 | #define ISP1583_GEN_INT_B |
48 | #define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A | 48 | #define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A |
49 | #define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */ | 49 | #define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */ |
50 | #define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74))) | 50 | #define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74))) |
51 | #define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78))) | 51 | #define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78))) |
52 | #define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C))) | 52 | #define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C))) |
53 | #define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84))) | 53 | #define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84))) |
54 | 54 | ||
55 | #define set_int_value(a,b,value) (a) = (value); | 55 | #define set_int_value(a,b,value) (a) = (value); |
56 | #endif | 56 | #endif |
57 | 57 | ||
58 | #define ISP1583_UNLOCK_CODE ((unsigned short)0xAA37) | 58 | #define ISP1583_UNLOCK_CODE ((unsigned short)0xAA37) |
59 | 59 | ||
60 | /* Initialization registers' bits */ | 60 | /* Initialization registers' bits */ |
61 | 61 | ||
62 | /* Initialization OTG register bits */ | 62 | /* Initialization OTG register bits */ |
63 | #define INIT_OTG_BSESS_VALID (1 << 4) | 63 | #define INIT_OTG_BSESS_VALID (1 << 4) |
64 | 64 | ||
65 | /* Initialization Mode register bits */ | 65 | /* Initialization Mode register bits */ |
66 | #define INIT_MODE_TEST2 (1 << 15) | 66 | #define INIT_MODE_TEST2 (1 << 15) |
67 | #define INIT_MODE_TEST1 (1 << 14) | 67 | #define INIT_MODE_TEST1 (1 << 14) |
68 | #define INIT_MODE_TEST0 (1 << 13) | 68 | #define INIT_MODE_TEST0 (1 << 13) |
69 | #define INIT_MODE_DMA_CLKON (1 << 9) | 69 | #define INIT_MODE_DMA_CLKON (1 << 9) |
70 | #define INIT_MODE_VBUSSTAT (1 << 8) | 70 | #define INIT_MODE_VBUSSTAT (1 << 8) |
71 | #define INIT_MODE_CLKAON (1 << 7) | 71 | #define INIT_MODE_CLKAON (1 << 7) |
72 | #define INIT_MODE_SNDRSU (1 << 6) | 72 | #define INIT_MODE_SNDRSU (1 << 6) |
73 | #define INIT_MODE_GOSUSP (1 << 5) | 73 | #define INIT_MODE_GOSUSP (1 << 5) |
74 | #define INIT_MODE_SFRESET (1 << 4) | 74 | #define INIT_MODE_SFRESET (1 << 4) |
75 | #define INIT_MODE_GLINTENA (1 << 3) | 75 | #define INIT_MODE_GLINTENA (1 << 3) |
76 | #define INIT_MODE_WKUPCS (1 << 2) | 76 | #define INIT_MODE_WKUPCS (1 << 2) |
77 | #define INIT_MODE_PWRON (1 << 1) | 77 | #define INIT_MODE_PWRON (1 << 1) |
78 | #define INIT_MODE_SOFTCT (1 << 0) | 78 | #define INIT_MODE_SOFTCT (1 << 0) |
79 | 79 | ||
80 | /* Initialization Interrupt Enable register bits */ | 80 | /* Initialization Interrupt Enable register bits */ |
81 | #define INIT_INTEN_IEP7TX (1 << 25) | 81 | #define INIT_INTEN_IEP7TX (1 << 25) |
82 | #define INIT_INTEN_IEP7RX (1 << 24) | 82 | #define INIT_INTEN_IEP7RX (1 << 24) |
83 | #define INIT_INTEN_IEP6TX (1 << 23) | 83 | #define INIT_INTEN_IEP6TX (1 << 23) |
84 | #define INIT_INTEN_IEP6RX (1 << 22) | 84 | #define INIT_INTEN_IEP6RX (1 << 22) |
85 | #define INIT_INTEN_IEP5TX (1 << 21) | 85 | #define INIT_INTEN_IEP5TX (1 << 21) |
86 | #define INIT_INTEN_IEP5RX (1 << 20) | 86 | #define INIT_INTEN_IEP5RX (1 << 20) |
87 | #define INIT_INTEN_IEP4TX (1 << 19) | 87 | #define INIT_INTEN_IEP4TX (1 << 19) |
88 | #define INIT_INTEN_IEP4RX (1 << 18) | 88 | #define INIT_INTEN_IEP4RX (1 << 18) |
89 | #define INIT_INTEN_IEP3TX (1 << 17) | 89 | #define INIT_INTEN_IEP3TX (1 << 17) |
90 | #define INIT_INTEN_IEP3RX (1 << 16) | 90 | #define INIT_INTEN_IEP3RX (1 << 16) |
91 | #define INIT_INTEN_IEP2TX (1 << 15) | 91 | #define INIT_INTEN_IEP2TX (1 << 15) |
92 | #define INIT_INTEN_IEP2RX (1 << 14) | 92 | #define INIT_INTEN_IEP2RX (1 << 14) |
93 | #define INIT_INTEN_IEP1TX (1 << 13) | 93 | #define INIT_INTEN_IEP1TX (1 << 13) |
94 | #define INIT_INTEN_IEP1RX (1 << 12) | 94 | #define INIT_INTEN_IEP1RX (1 << 12) |
95 | #define INIT_INTEN_IEP0TX (1 << 11) | 95 | #define INIT_INTEN_IEP0TX (1 << 11) |
96 | #define INIT_INTEN_IEP0RX (1 << 10) | 96 | #define INIT_INTEN_IEP0RX (1 << 10) |
97 | #define INIT_INTEN_IEP0SETUP (1 << 8) | 97 | #define INIT_INTEN_IEP0SETUP (1 << 8) |
98 | #define INIT_INTEN_IEVBUS (1 << 7) | 98 | #define INIT_INTEN_IEVBUS (1 << 7) |
99 | #define INIT_INTEN_IEDMA (1 << 6) | 99 | #define INIT_INTEN_IEDMA (1 << 6) |
100 | #define INIT_INTEN_IEHS_STA (1 << 5) | 100 | #define INIT_INTEN_IEHS_STA (1 << 5) |
101 | #define INIT_INTEN_IERESM (1 << 4) | 101 | #define INIT_INTEN_IERESM (1 << 4) |
102 | #define INIT_INTEN_IESUSP (1 << 3) | 102 | #define INIT_INTEN_IESUSP (1 << 3) |
103 | #define INIT_INTEN_IEPSOF (1 << 2) | 103 | #define INIT_INTEN_IEPSOF (1 << 2) |
104 | #define INIT_INTEN_IESOF (1 << 1) | 104 | #define INIT_INTEN_IESOF (1 << 1) |
105 | #define INIT_INTEN_IEBRST (1 << 0) | 105 | #define INIT_INTEN_IEBRST (1 << 0) |
106 | 106 | ||
107 | /* Initialization Interrupt Configuration register bits */ | 107 | /* Initialization Interrupt Configuration register bits */ |
108 | #define INIT_INTCONF_INTLVL (1 << 1) | 108 | #define INIT_INTCONF_INTLVL (1 << 1) |
109 | #define INIT_INTCONF_INTPOL (1 << 0) | 109 | #define INIT_INTCONF_INTPOL (1 << 0) |
110 | 110 | ||
111 | /* Initialization Address register bits */ | 111 | /* Initialization Address register bits */ |
112 | #define INIT_ADDRESS_DEVEN (1 << 7) | 112 | #define INIT_ADDRESS_DEVEN (1 << 7) |
113 | 113 | ||
114 | /* Data Flow registers' bits */ | 114 | /* Data Flow registers' bits */ |
115 | 115 | ||
116 | /* Data Flow Endpoint Index register bits */ | 116 | /* Data Flow Endpoint Index register bits */ |
117 | #define DFLOW_EPINDEX_EP0SETUP (1 << 5) | 117 | #define DFLOW_EPINDEX_EP0SETUP (1 << 5) |
118 | 118 | ||
119 | /* Data Flow Control Function register bits */ | 119 | /* Data Flow Control Function register bits */ |
120 | #define DFLOW_CTRLFUN_CLBUF (1 << 4) | 120 | #define DFLOW_CTRLFUN_CLBUF (1 << 4) |
121 | #define DFLOW_CTRLFUN_VENDP (1 << 3) | 121 | #define DFLOW_CTRLFUN_VENDP (1 << 3) |
122 | #define DFLOW_CTRLFUN_DSEN (1 << 2) | 122 | #define DFLOW_CTRLFUN_DSEN (1 << 2) |
123 | #define DFLOW_CTRLFUN_STATUS (1 << 1) | 123 | #define DFLOW_CTRLFUN_STATUS (1 << 1) |
124 | #define DFLOW_CTRLFUN_STALL (1 << 0) | 124 | #define DFLOW_CTRLFUN_STALL (1 << 0) |
125 | 125 | ||
126 | /* Data Flow Endpoint Type register bits */ | 126 | /* Data Flow Endpoint Type register bits */ |
127 | #define DFLOW_EPTYPE_NOEMPKT (1 << 4) | 127 | #define DFLOW_EPTYPE_NOEMPKT (1 << 4) |
128 | #define DFLOW_EPTYPE_ENABLE (1 << 3) | 128 | #define DFLOW_EPTYPE_ENABLE (1 << 3) |
129 | #define DFLOW_EPTYPE_DBLBUF (1 << 2) | 129 | #define DFLOW_EPTYPE_DBLBUF (1 << 2) |
130 | 130 | ||
131 | /* General registers' bits */ | 131 | /* General registers' bits */ |
132 | 132 | ||
133 | /* General Test Mode register bits */ | 133 | /* General Test Mode register bits */ |
134 | #define GEN_TSTMOD_FORCEHS (1 << 7) | 134 | #define GEN_TSTMOD_FORCEHS (1 << 7) |
135 | #define GEN_TSTMOD_FORCEFS (1 << 4) | 135 | #define GEN_TSTMOD_FORCEFS (1 << 4) |
136 | #define GEN_TSTMOD_PRBS (1 << 3) | 136 | #define GEN_TSTMOD_PRBS (1 << 3) |
137 | #define GEN_TSTMOD_KSTATE (1 << 2) | 137 | #define GEN_TSTMOD_KSTATE (1 << 2) |
138 | #define GEN_TSTMOD_JSTATE (1 << 1) | 138 | #define GEN_TSTMOD_JSTATE (1 << 1) |
139 | #define GEN_TSTMOD_SE0_NAK (1 << 0) | 139 | #define GEN_TSTMOD_SE0_NAK (1 << 0) |
140 | 140 | ||
141 | /* Interrupts */ | 141 | /* Interrupts */ |
142 | #define INT_IEP7TX (1 << 25) | 142 | #define INT_IEP7TX (1 << 25) |
143 | #define INT_IEP7RX (1 << 24) | 143 | #define INT_IEP7RX (1 << 24) |
144 | #define INT_IEP6TX (1 << 23) | 144 | #define INT_IEP6TX (1 << 23) |
145 | #define INT_IEP6RX (1 << 22) | 145 | #define INT_IEP6RX (1 << 22) |
146 | #define INT_IEP5TX (1 << 21) | 146 | #define INT_IEP5TX (1 << 21) |
147 | #define INT_IEP5RX (1 << 20) | 147 | #define INT_IEP5RX (1 << 20) |
148 | #define INT_IEP4TX (1 << 19) | 148 | #define INT_IEP4TX (1 << 19) |
149 | #define INT_IEP4RX (1 << 18) | 149 | #define INT_IEP4RX (1 << 18) |
150 | #define INT_IEP3TX (1 << 17) | 150 | #define INT_IEP3TX (1 << 17) |
151 | #define INT_IEP3RX (1 << 16) | 151 | #define INT_IEP3RX (1 << 16) |
152 | #define INT_IEP2TX (1 << 15) | 152 | #define INT_IEP2TX (1 << 15) |
153 | #define INT_IEP2RX (1 << 14) | 153 | #define INT_IEP2RX (1 << 14) |
154 | #define INT_IEP1TX (1 << 13) | 154 | #define INT_IEP1TX (1 << 13) |
155 | #define INT_IEP1RX (1 << 12) | 155 | #define INT_IEP1RX (1 << 12) |
156 | #define INT_IEP0TX (1 << 11) | 156 | #define INT_IEP0TX (1 << 11) |
157 | #define INT_IEP0RX (1 << 10) | 157 | #define INT_IEP0RX (1 << 10) |
158 | #define INT_IEP0SETUP (1 << 8) | 158 | #define INT_IEP0SETUP (1 << 8) |
159 | #define INT_IEVBUS (1 << 7) | 159 | #define INT_IEVBUS (1 << 7) |
160 | #define INT_IEDMA (1 << 6) | 160 | #define INT_IEDMA (1 << 6) |
161 | #define INT_IEHS_STA (1 << 5) | 161 | #define INT_IEHS_STA (1 << 5) |
162 | #define INT_IERESM (1 << 4) | 162 | #define INT_IERESM (1 << 4) |
163 | #define INT_IESUSP (1 << 3) | 163 | #define INT_IESUSP (1 << 3) |
164 | #define INT_IEPSOF (1 << 2) | 164 | #define INT_IEPSOF (1 << 2) |
165 | #define INT_IESOF (1 << 1) | 165 | #define INT_IESOF (1 << 1) |
166 | #define INT_IEBRST (1 << 0) | 166 | #define INT_IEBRST (1 << 0) |
167 | 167 | ||
168 | #define INT_EP_MASK ( INT_IEP0RX | INT_IEP0TX | INT_IEP1RX | INT_IEP1TX | INT_IEP2RX | INT_IEP2TX | INT_IEP3RX | INT_IEP3TX | INT_IEP4RX | INT_IEP4TX | INT_IEP5RX | INT_IEP5TX | INT_IEP6RX | INT_IEP6TX | INT_IEP7RX | INT_IEP7TX ) | 168 | #define INT_EP_MASK ( INT_IEP0RX | INT_IEP0TX | INT_IEP1RX | INT_IEP1TX | INT_IEP2RX | INT_IEP2TX | INT_IEP3RX | INT_IEP3TX | INT_IEP4RX | INT_IEP4TX | INT_IEP5RX | INT_IEP5TX | INT_IEP6RX | INT_IEP6TX | INT_IEP7RX | INT_IEP7TX ) |
169 | 169 | ||
170 | #define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX ) | 170 | #define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX ) |
171 | #define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA ) | 171 | #define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA ) |
172 | 172 | ||
173 | #ifdef USE_IRAM | 173 | #ifdef USE_IRAM |
174 | #define IRAM_ATTR __attribute__ ((section(".icode"))) | 174 | #define IRAM_ATTR __attribute__ ((section(".icode"))) |
175 | #else | 175 | #else |
176 | #define IRAM_ATTR | 176 | #define IRAM_ATTR |
177 | #endif | 177 | #endif |
178 | 178 | ||
179 | #include "usb_drv.h" | 179 | #include "usb_drv.h" |
180 | 180 | ||
181 | #endif | 181 | #endif |
diff --git a/firmware/export/m66591.h b/firmware/export/m66591.h index db7776e45f..b1a0883549 100644 --- a/firmware/export/m66591.h +++ b/firmware/export/m66591.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2009 by Karl Kurbjun | 10 | * Copyright (C) 2009 by Karl Kurbjun |
11 | * | 11 | * |
diff --git a/firmware/export/nand_id.h b/firmware/export/nand_id.h index fb7ea18b8d..712fcdc606 100644 --- a/firmware/export/nand_id.h +++ b/firmware/export/nand_id.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2002 by Alan Korr | 10 | * Copyright (C) 2002 by Alan Korr |
11 | * | 11 | * |
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index 1ea332ace4..c026328f7f 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: S5L8700X.h 2008-03-27 Marcoen Hirschberg, Bart van Adrichem $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2008 by Marcoen Hirschberg, Bart van Adrichem | 10 | * Copyright (C) 2008 by Marcoen Hirschberg, Bart van Adrichem |
11 | * | 11 | * |
diff --git a/firmware/export/spi.h b/firmware/export/spi.h index 55b22e1a79..e6042631d2 100644 --- a/firmware/export/spi.h +++ b/firmware/export/spi.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Catalin Patulea | 10 | * Copyright (C) 2007 by Catalin Patulea |
11 | * | 11 | * |
diff --git a/firmware/export/tsc2100.h b/firmware/export/tsc2100.h index 7a06593fd7..a0be067409 100644 --- a/firmware/export/tsc2100.h +++ b/firmware/export/tsc2100.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | 5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < |
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | 6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ |
7 | * \/ \/ \/ \/ \/ | 7 | * \/ \/ \/ \/ \/ |
8 | * $Id: $ | 8 | * $Id$ |
9 | * | 9 | * |
10 | * Copyright (C) 2007 by Jonathan Gordon | 10 | * Copyright (C) 2007 by Jonathan Gordon |
11 | * | 11 | * |