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| author | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-11 16:22:56 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-04-11 16:22:56 +0000 |
| commit | 07ec3c9d69b12103dbfa608ebcfa0c73e91ebbbb (patch) | |
| tree | 21665d6deaca106ac7de325e65c07b120d64a6ab | |
| parent | beca69b3a640e1197822265b23b6419effff686c (diff) | |
| download | rockbox-07ec3c9d69b12103dbfa608ebcfa0c73e91ebbbb.tar.gz rockbox-07ec3c9d69b12103dbfa608ebcfa0c73e91ebbbb.zip | |
as3525v2: extend a bit the delay after switching pclk/fclk
fix r25571 : Clipv2 would boot to a black screen
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25592 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/as3525/system-as3525.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 90535fc170..b1b1967936 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c | |||
| @@ -441,13 +441,13 @@ void set_cpu_frequency(long frequency) | |||
| 441 | /* Change PCLK while FCLK is low, so it doesn't go too high */ | 441 | /* Change PCLK while FCLK is low, so it doesn't go too high */ |
| 442 | CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0 << 2); | 442 | CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0 << 2); |
| 443 | 443 | ||
| 444 | delay = 40; while(delay--) ; | 444 | delay = 40; while(delay--) asm("nop"); |
| 445 | 445 | ||
| 446 | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | | 446 | CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | |
| 447 | (AS3525_FCLK_PREDIV << 2) | | 447 | (AS3525_FCLK_PREDIV << 2) | |
| 448 | AS3525_FCLK_SEL); | 448 | AS3525_FCLK_SEL); |
| 449 | 449 | ||
| 450 | delay = 40; while(delay--) ; | 450 | delay = 40; while(delay--) asm("nop"); |
| 451 | 451 | ||
| 452 | } | 452 | } |
| 453 | else | 453 | else |
| @@ -458,11 +458,11 @@ void set_cpu_frequency(long frequency) | |||
| 458 | (AS3525_FCLK_PREDIV << 2) | | 458 | (AS3525_FCLK_PREDIV << 2) | |
| 459 | AS3525_FCLK_SEL); | 459 | AS3525_FCLK_SEL); |
| 460 | 460 | ||
| 461 | delay = 40; while(delay--) ; | 461 | delay = 40; while(delay--) asm("nop"); |
| 462 | 462 | ||
| 463 | /* Change PCLK after FCLK is low, so it doesn't go too high */ | 463 | /* Change PCLK after FCLK is low, so it doesn't go too high */ |
| 464 | CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); | 464 | CGU_PERI = (CGU_PERI & ~(0x1F << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); |
| 465 | delay = 40; while(delay--) ; | 465 | delay = 40; while(delay--) asm("nop"); |
| 466 | } | 466 | } |
| 467 | 467 | ||
| 468 | cpu_frequency = frequency; | 468 | cpu_frequency = frequency; |