diff options
author | Jens Arnold <amiconn@rockbox.org> | 2008-03-26 23:45:55 +0000 |
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committer | Jens Arnold <amiconn@rockbox.org> | 2008-03-26 23:45:55 +0000 |
commit | 06ec18d93fcead9b954c98c3d8a254281e0ea0bf (patch) | |
tree | 97aa908c9ff046e96535bc93d59ef5b136612eb7 | |
parent | 91a564e4b9c3141b7ff8595842522efe7434ec47 (diff) | |
download | rockbox-06ec18d93fcead9b954c98c3d8a254281e0ea0bf.tar.gz rockbox-06ec18d93fcead9b954c98c3d8a254281e0ea0bf.zip |
Slightly better instruction order, added comment.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16833 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/coldfire/iaudio/lcd-remote-as-iaudio.S | 8 | ||||
-rw-r--r-- | firmware/target/coldfire/iaudio/m3/lcd-as-m3.S | 10 |
2 files changed, 11 insertions, 7 deletions
diff --git a/firmware/target/coldfire/iaudio/lcd-remote-as-iaudio.S b/firmware/target/coldfire/iaudio/lcd-remote-as-iaudio.S index 18028a81c3..c1e38d0351 100644 --- a/firmware/target/coldfire/iaudio/lcd-remote-as-iaudio.S +++ b/firmware/target/coldfire/iaudio/lcd-remote-as-iaudio.S | |||
@@ -32,6 +32,7 @@ | |||
32 | /* Output 8 bits to the LCD. Instruction order is devised to maximize the | 32 | /* Output 8 bits to the LCD. Instruction order is devised to maximize the |
33 | * delay between changing the data line and the CLK L->H transition, which | 33 | * delay between changing the data line and the CLK L->H transition, which |
34 | * makes the LCD controller sample DATA. | 34 | * makes the LCD controller sample DATA. |
35 | * Requires CLK = 1 on entry. | ||
35 | * | 36 | * |
36 | * Custom calling convention: | 37 | * Custom calling convention: |
37 | * %a0 - GPIO_OUT_ADDR | 38 | * %a0 - GPIO_OUT_ADDR |
@@ -63,8 +64,8 @@ | |||
63 | bcc.s 1f | 64 | bcc.s 1f |
64 | eor.l %d6, %d0 /* 1: Flip data bit */ | 65 | eor.l %d6, %d0 /* 1: Flip data bit */ |
65 | 1: | 66 | 1: |
66 | move.l %d0, %d1 | ||
67 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ | 67 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ |
68 | move.l %d0, %d1 | ||
68 | eor.l %d7, %d1 | 69 | eor.l %d7, %d1 |
69 | bra.w .wr_bit7 | 70 | bra.w .wr_bit7 |
70 | 71 | ||
@@ -72,6 +73,7 @@ | |||
72 | /* Output 16 bits to the LCD. Instruction order is devised to maximize the | 73 | /* Output 16 bits to the LCD. Instruction order is devised to maximize the |
73 | * delay between changing the data line and the CLK L->H transition, which | 74 | * delay between changing the data line and the CLK L->H transition, which |
74 | * makes the LCD controller sample DATA. | 75 | * makes the LCD controller sample DATA. |
76 | * Requires CLK = 1 on entry. | ||
75 | * | 77 | * |
76 | * Custom calling convention: | 78 | * Custom calling convention: |
77 | * %a0 - GPIO_OUT_ADDR | 79 | * %a0 - GPIO_OUT_ADDR |
@@ -102,8 +104,8 @@ | |||
102 | bcc.s 1f | 104 | bcc.s 1f |
103 | eor.l %d6, %d0 /* 1: Flip data bit */ | 105 | eor.l %d6, %d0 /* 1: Flip data bit */ |
104 | 1: | 106 | 1: |
105 | move.l %d0, %d1 | ||
106 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ | 107 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ |
108 | move.l %d0, %d1 | ||
107 | eor.l %d7, %d1 | 109 | eor.l %d7, %d1 |
108 | nop | 110 | nop |
109 | 111 | ||
@@ -113,8 +115,8 @@ | |||
113 | eor.l %d6, %d0 | 115 | eor.l %d6, %d0 |
114 | 1: | 116 | 1: |
115 | move.l %d1, (%a0) /* Set CLK = 1 (delayed) */ | 117 | move.l %d1, (%a0) /* Set CLK = 1 (delayed) */ |
116 | move.l %d0, %d1 | ||
117 | move.l %d0, (%a0) | 118 | move.l %d0, (%a0) |
119 | move.l %d0, %d1 | ||
118 | eor.l %d7, %d1 | 120 | eor.l %d7, %d1 |
119 | .endm | 121 | .endm |
120 | bit_out | 122 | bit_out |
diff --git a/firmware/target/coldfire/iaudio/m3/lcd-as-m3.S b/firmware/target/coldfire/iaudio/m3/lcd-as-m3.S index 5f77e01e86..a135ce5eb6 100644 --- a/firmware/target/coldfire/iaudio/m3/lcd-as-m3.S +++ b/firmware/target/coldfire/iaudio/m3/lcd-as-m3.S | |||
@@ -32,6 +32,7 @@ | |||
32 | /* Output 8 bits to the LCD. Instruction order is devised to maximize the | 32 | /* Output 8 bits to the LCD. Instruction order is devised to maximize the |
33 | * delay between changing the data line and the CLK L->H transition, which | 33 | * delay between changing the data line and the CLK L->H transition, which |
34 | * makes the LCD controller sample DATA. | 34 | * makes the LCD controller sample DATA. |
35 | * Requires CLK = 1 on entry. | ||
35 | * | 36 | * |
36 | * Custom calling convention: | 37 | * Custom calling convention: |
37 | * %a0 - GPIO_OUT_ADDR | 38 | * %a0 - GPIO_OUT_ADDR |
@@ -63,8 +64,8 @@ | |||
63 | bcc.s 1f | 64 | bcc.s 1f |
64 | eor.l %d6, %d0 /* 1: Flip data bit */ | 65 | eor.l %d6, %d0 /* 1: Flip data bit */ |
65 | 1: | 66 | 1: |
66 | move.l %d0, %d1 | ||
67 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ | 67 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ |
68 | move.l %d0, %d1 | ||
68 | eor.l %d7, %d1 | 69 | eor.l %d7, %d1 |
69 | bra.w .wr_bit7 | 70 | bra.w .wr_bit7 |
70 | 71 | ||
@@ -72,6 +73,7 @@ | |||
72 | /* Output 16 bits to the LCD. Instruction order is devised to maximize the | 73 | /* Output 16 bits to the LCD. Instruction order is devised to maximize the |
73 | * delay between changing the data line and the CLK L->H transition, which | 74 | * delay between changing the data line and the CLK L->H transition, which |
74 | * makes the LCD controller sample DATA. | 75 | * makes the LCD controller sample DATA. |
76 | * Requires CLK = 1 on entry. | ||
75 | * | 77 | * |
76 | * Custom calling convention: | 78 | * Custom calling convention: |
77 | * %a0 - GPIO_OUT_ADDR | 79 | * %a0 - GPIO_OUT_ADDR |
@@ -102,8 +104,8 @@ | |||
102 | bcc.s 1f | 104 | bcc.s 1f |
103 | eor.l %d6, %d0 /* 1: Flip data bit */ | 105 | eor.l %d6, %d0 /* 1: Flip data bit */ |
104 | 1: | 106 | 1: |
105 | move.l %d0, %d1 | ||
106 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ | 107 | move.l %d0, (%a0) /* Output new state and set CLK = 0*/ |
108 | move.l %d0, %d1 | ||
107 | eor.l %d7, %d1 | 109 | eor.l %d7, %d1 |
108 | nop | 110 | nop |
109 | 111 | ||
@@ -113,8 +115,8 @@ | |||
113 | eor.l %d6, %d0 | 115 | eor.l %d6, %d0 |
114 | 1: | 116 | 1: |
115 | move.l %d1, (%a0) /* Set CLK = 1 (delayed) */ | 117 | move.l %d1, (%a0) /* Set CLK = 1 (delayed) */ |
116 | move.l %d0, %d1 | ||
117 | move.l %d0, (%a0) | 118 | move.l %d0, (%a0) |
119 | move.l %d0, %d1 | ||
118 | eor.l %d7, %d1 | 120 | eor.l %d7, %d1 |
119 | .endm | 121 | .endm |
120 | bit_out | 122 | bit_out |
@@ -310,7 +312,7 @@ lcd_write_data: | |||
310 | movem.l (%sp), %d2-%d4/%d6-%d7/%a2-%a3 | 312 | movem.l (%sp), %d2-%d4/%d6-%d7/%a2-%a3 |
311 | lea.l (7*4, %sp), %sp | 313 | lea.l (7*4, %sp), %sp |
312 | rts | 314 | rts |
313 | 315 | ||
314 | 316 | ||
315 | /*** The following functions are only needed for main LCDs ***/ | 317 | /*** The following functions are only needed for main LCDs ***/ |
316 | 318 | ||