From 4f950e0af98bc75ec9d6aa59d85da8b1c7d1a5ae Mon Sep 17 00:00:00 2001 From: Marcin Bukat Date: Sun, 15 Jun 2014 12:53:28 +0200 Subject: hwstub: Add support for rk27xx lradc block Change-Id: I8fe15ad8207ac7098944bb85d6b66b91b9858e8f --- utils/hwstub/tools/lua/rk27xx.lua | 8 ++++++++ utils/hwstub/tools/lua/rk27xx/lradc.lua | 12 ++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 utils/hwstub/tools/lua/rk27xx.lua create mode 100644 utils/hwstub/tools/lua/rk27xx/lradc.lua (limited to 'utils/hwstub') diff --git a/utils/hwstub/tools/lua/rk27xx.lua b/utils/hwstub/tools/lua/rk27xx.lua new file mode 100644 index 0000000000..2a5bb9287c --- /dev/null +++ b/utils/hwstub/tools/lua/rk27xx.lua @@ -0,0 +1,8 @@ +--- +--- Chip Identification +--- + +RK27XX = {} + +hwstub.soc:select("rk27xx") +require 'rk27xx/lcdif' diff --git a/utils/hwstub/tools/lua/rk27xx/lradc.lua b/utils/hwstub/tools/lua/rk27xx/lradc.lua new file mode 100644 index 0000000000..943bdac72e --- /dev/null +++ b/utils/hwstub/tools/lua/rk27xx/lradc.lua @@ -0,0 +1,12 @@ +RK27XX.adc = {} + +function RK27XX.adc.init() + -- setup ADC clock divider to reach max 1MHz + HW.SCU.DIVCON1.write(bit32.replace(HW.SCU.DIVCON1.read(), 49, 10, 8)) +end + +function RK27XX.adc.read(channel) + HW.ADC.CTRL.write(bit32.bor(bit32.lshift(1,4), bit32.lshift(1,3), bit32.band(channel,3))) + -- udelay(20) + return bit32.band(HW.ADC.DATA.read(), 0x3ff) +end -- cgit v1.2.3