From 56340f4cd0a6ab318a52d2a62ded36aad2946e1d Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Tue, 2 Aug 2016 15:18:41 +0100 Subject: hwstub: add the possibility to flush caches before exec This is needed on the jz4760b because if some data is loaded to DRAM, then it is cached and a disaster lurks if dcaches/icache are not flushed. Targets that needs this must define CONFIG_FLUSH_CACHES in target-config.h and implement target_flush_caches(). Currently MIPS has some generic code for mips32r1 that requires to define {D,I}CACHE_SIZE and {D,I}CACHE_LINE_SIZE in target-config.h Change-Id: I5a3fc085de9445d8c8a2eb61ae4e2dc9bb6b4e8e --- utils/hwstub/stub/main.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'utils/hwstub/stub/main.c') diff --git a/utils/hwstub/stub/main.c b/utils/hwstub/stub/main.c index ee93ad4b63..c35872f320 100644 --- a/utils/hwstub/stub/main.c +++ b/utils/hwstub/stub/main.c @@ -518,10 +518,17 @@ static void handle_exec(struct usb_ctrlrequest *req) if(size != sizeof(struct hwstub_exec_req_t)) return usb_drv_stall(EP_CONTROL, true, true); uint32_t addr = exec->dAddress; + +#if defined(CPU_ARM) if(exec->bmFlags & HWSTUB_EXEC_THUMB) addr |= 1; else addr &= ~1; +#endif + +#ifdef CONFIG_FLUSH_CACHES + target_flush_caches(); +#endif if(exec->bmFlags & HWSTUB_EXEC_CALL) { @@ -540,11 +547,13 @@ static void handle_exec(struct usb_ctrlrequest *req) else { /* in case of jump, respond immediately and disconnect usb */ +#if defined(CPU_ARM) usb_drv_send(EP_CONTROL, NULL, 0); usb_drv_exit(); -#if defined(CPU_ARM) asm volatile("bx %0\n" : : "r" (addr) : "memory"); #elif defined(CPU_MIPS) + usb_drv_send(EP_CONTROL, NULL, 0); + usb_drv_exit(); asm volatile("jr %0\nnop\n" : : "r" (addr) : "memory"); #else #warning jump is unsupported on this platform -- cgit v1.2.3