From 66f183077d835b7d3bc2041fad89a65f04faacb9 Mon Sep 17 00:00:00 2001
From: Rafaël Carré <rafael.carre@gmail.com>
Date: Mon, 17 May 2010 21:57:46 +0000
Subject: Clip+: boot to OF if USB is connected

To be sure that there is no mistake in this code, it is run *after*
the known to work HOME & LEFT buttons checks, unlike other Sansas

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26122 a1c6a512-1295-4272-9138-f99709370657
---
 rbutil/mkamsboot/dualboot/dualboot.S | 63 ++++++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

(limited to 'rbutil/mkamsboot/dualboot')

diff --git a/rbutil/mkamsboot/dualboot/dualboot.S b/rbutil/mkamsboot/dualboot/dualboot.S
index 8bb2059d78..309aa67742 100644
--- a/rbutil/mkamsboot/dualboot/dualboot.S
+++ b/rbutil/mkamsboot/dualboot/dualboot.S
@@ -26,6 +26,7 @@
 .set GPIOB,     0xC80C0000
 .set GPIOC,     0xC80D0000
 .set GPIOD,     0xC80E0000
+.set CGU_PROC,  0xC80F0010
 .set CGU_PERI,  0xC80F0014
 .set I2C_BASE,  0xC8070000
 .set I2C_DATA,  0x00
@@ -239,6 +240,68 @@ uclcopy:
 
         cmp     r2, #0              @ test input from pins
         bne     boot_of             @ branch directly to OF if either pin high
+
+
+        @ check USB connection
+
+        ldr     r0, =CGU_PROC
+        mov     r1, #0
+        str     r1, [r0]    @ fclk = 24MHz
+
+        ldr     r0, =CGU_PERI
+        ldr     r1, [r0]
+        /* enable i2c audio master clock */
+        orr     r1, r1, #(1<<17)
+        /* pclk = fclk = 24MHz */
+        bic     r1, r1, #0x7f
+        str     r1, [r0]
+
+        ldr     r0, =I2C_BASE
+        /* disable i2c interrupts */
+        mov     r1, #0
+        str     r1, [r0, #I2C_IMR]
+        /* setup prescaler */
+        mov     r1, #I2C_PRESCALER_LOW
+        str     r1, [r0, #I2C_CPSR0]
+        mov     r1, #I2C_PRESCALER_HIGH
+        str     r1, [r0, #I2C_CPSR1]
+        /* setup i2c slave address */
+        mov     r1, #(AS3514_I2C_ADDR << 1)
+        str     r1, [r0, #I2C_SLAD0]
+        mov     r2, #0x51
+        str     r2, [r0, #I2C_CNTRL]
+
+        /* wait for not busy */
+1:
+        ldr     r1, [r0, #I2C_SR]
+        tst     r1, #1
+        bne 1b
+
+        /* wait a bit (~100ms) else detection fails */
+        mov     r1, #0x80000
+1:      subs    r1, r1, #1
+        bne 1b
+
+        /* start read of irq_enrd0 */
+        mov     r1, #AS3514_IRQ_ENRD0
+        str     r1, [r0, #I2C_SADDR]
+        orr     r2, r2, #(1 << 1)
+        str     r2, [r0, #I2C_CNTRL]
+        mov     r1, #1
+        str     r1, [r0, #I2C_DACNT]
+
+        /* wait for transfer to finish */
+1:
+        ldr     r1, [r0, #I2C_DACNT]
+        cmp     r1, #0
+        bne     1b
+
+        /* load result and test USB_STATUS bit */
+        ldr     r1, [r0, #I2C_DATA]
+        tst     r1, #(1 << 3)
+        bne     boot_of
+
+
 #elif defined(SANSA_C200V2)
         /* check for RIGHT on C6, should changed to LEFT as soon as it
          * known in which pin that is in order for consistency  */
-- 
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