From 33f3af2b8dbda1e67f07c9c63a07fb3e9af6fa59 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Wed, 22 May 2013 18:50:28 -0400 Subject: SPC Codec: Add ARMv5 optimized code. Easy peasy. Why? Why not? Cuts a few MHz. Change-Id: Ied5c70b1aedd255cbe5d42b7d3028bbe47aad01d --- lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h | 30 +++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h (limited to 'lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h') diff --git a/lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h b/lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h new file mode 100644 index 0000000000..7056928856 --- /dev/null +++ b/lib/rbcodec/codecs/libspc/cpu/spc_dsp_armv5.h @@ -0,0 +1,30 @@ +#if !SPC_NOINTERP +/* Want scale optimized for smulw(y) */ +#define GAUSS_TABLE_SCALE 4 +#endif + +#if !SPC_NOECHO + +#define SPC_DSP_ECHO_APPLY + +enum +{ + FIR_BUF_CNT = FIR_BUF_HALF * 2, + FIR_BUF_SIZE = FIR_BUF_CNT * sizeof ( int32_t ), + FIR_BUF_ALIGN = FIR_BUF_SIZE, + FIR_BUF_MASK = ~((FIR_BUF_ALIGN / 2) | (sizeof ( int32_t ) - 1)) +}; + +/* Echo filter structure embedded in struct Spc_Dsp */ +struct echo_filter +{ + /* fir_buf [i + 8] == fir_buf [i], to avoid wrap checking in FIR code */ + int32_t* ptr; + /* FIR history is interleaved with guard to eliminate wrap checking + * when convolving. + * |LR|LR|LR|LR|LR|LR|LR|LR|--|--|--|--|--|--|--|--| */ + /* copy of echo FIR constants as int16_t, loaded as int32 for + * halfword, packed multiples */ + int16_t coeff [VOICE_COUNT]; +}; +#endif /* SPC_NOECHO */ -- cgit v1.2.3