From f788e8feffedc056ded4b2d8134e9805dc2caab2 Mon Sep 17 00:00:00 2001 From: Michael Sparmann Date: Wed, 25 Nov 2009 19:15:19 +0000 Subject: Fix the S5L8701 µsec timer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23747 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/s5l8700.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'firmware') diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index a8341137ee..94b0c4e703 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h @@ -310,9 +310,9 @@ #define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */ #define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */ #define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */ -#define FIVE_USEC_TIMER (((*(REG32_PTR_T)(0x3C700080)) << 32) \ - | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */ -#define USEC_TIMER ((*(REG32_PTR_T)(0x3C700084)) * 5) /* lower 32 bits of the above as a usec timer */ +#define FIVE_USEC_TIMER (((uint64_t)(*(REG32_PTR_T)(0x3C700080)) << 32) \ + | (*(REG32_PTR_T)(0x3C700084))) /* 64bit 5usec timer */ +#define USEC_TIMER FIVE_USEC_TIMER * 5 /* usecs */ /* 12. NAND FLASH CONTROLER */ #if CONFIG_CPU==S5L8701 -- cgit v1.2.3