From bb6fc21244032fd763159d02639e91390712dec2 Mon Sep 17 00:00:00 2001
From: Solomon Peachy <pizza@shaftnet.org>
Date: Wed, 2 Sep 2020 08:25:43 -0400
Subject: mips:  use .set push/pop in asm code

Change-Id: I3e7bc7ffb8d6d0c5d18a6ab38b1a270559a62fb9
---
 firmware/asm/mips/thread-mips32.c                   | 13 ++++++-------
 firmware/target/mips/ingenic_jz47xx/system-target.h |  7 +++++--
 2 files changed, 11 insertions(+), 9 deletions(-)

(limited to 'firmware')

diff --git a/firmware/asm/mips/thread-mips32.c b/firmware/asm/mips/thread-mips32.c
index b8e684bb80..3da8de560b 100644
--- a/firmware/asm/mips/thread-mips32.c
+++ b/firmware/asm/mips/thread-mips32.c
@@ -32,14 +32,14 @@ static void USED_ATTR _start_thread(void)
     /* t1 = context */
     asm volatile (
       "start_thread:          \n"
+        ".set push            \n"
         ".set noreorder       \n"
         ".set noat            \n"
         "lw     $8,    4($9)  \n" /* Fetch thread function pointer ($8 = t0, $9 = t1) */
         "lw     $29,  36($9)  \n" /* Set initial sp(=$29) */
         "jalr   $8            \n" /* Start the thread */
         "sw     $0,   44($9)  \n" /* Clear start address */
-        ".set at              \n"
-        ".set reorder         \n"
+        ".set pop             \n"
     );
     thread_exit();
 }
@@ -58,6 +58,7 @@ static void USED_ATTR _start_thread(void)
 static inline void store_context(void* addr)
 {
     asm volatile (
+        ".set push             \n"
         ".set noreorder        \n"
         ".set noat             \n"
         "move  $8, %0          \n" /* Store addr in clobbered t0 othrewise
@@ -76,8 +77,7 @@ static inline void store_context(void* addr)
         "sw    $30, 32($8)     \n" /* fp */
         "sw    $29, 36($8)     \n" /* sp */
         "sw    $31, 40($8)     \n" /* ra */
-        ".set at               \n"
-        ".set reorder          \n"
+        ".set pop              \n"
         : : "r" (addr) : "t0"
     );
 }
@@ -89,6 +89,7 @@ static inline void store_context(void* addr)
 static inline void load_context(const void* addr)
 {
     asm volatile (
+        ".set push             \n"
         ".set noat             \n"
         ".set noreorder        \n"
         "lw    $8, 44(%0)      \n" /* Get start address ($8 = t0) */
@@ -113,9 +114,7 @@ static inline void load_context(const void* addr)
         "lw    $30, 32($8)     \n" /* fp */
         "lw    $29, 36($8)     \n" /* sp */
         "lw    $31, 40($8)     \n" /* ra */
-        ".set at               \n"
-        ".set reorder          \n"
+        ".set pop              \n"
         : : "r" (addr) : "t0", "t1"
     );
 }
-
diff --git a/firmware/target/mips/ingenic_jz47xx/system-target.h b/firmware/target/mips/ingenic_jz47xx/system-target.h
index d8c395cef2..30c1668bf7 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-target.h
+++ b/firmware/target/mips/ingenic_jz47xx/system-target.h
@@ -123,7 +123,10 @@ static inline void core_sleep(void)
 #if CONFIG_CPU == JZ4732 || CONFIG_CPU == JZ4760B
     __cpm_idle_mode();
 #endif
-    asm volatile(".set   mips32r2           \n"
+    asm volatile(
+                 ".set   push               \n"
+                 ".set   mips32r2           \n"
+                 ".set   noreorder          \n"
                  "mfc0   $8, $12            \n" /* mfc t0, $12 */
                  "move   $9, $8             \n" /* move t1, t0 */
                  "la     $10, 0x8000000     \n" /* la t2, 0x8000000 */
@@ -131,7 +134,7 @@ static inline void core_sleep(void)
                  "mtc0   $8, $12            \n" /* mtc t0, $12 */
                  "wait                      \n"
                  "mtc0   $9, $12            \n" /* mtc t1, $12 */
-                 ".set   mips0              \n"
+                 ".set   pop                \n"
                  ::: "t0", "t1", "t2"
                  );
     enable_irq();
-- 
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