From b73fda3a05f78a3ce78708e319f2eb719fd55719 Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Sun, 16 Jun 2013 16:56:34 +0200 Subject: imx233: rewrite pinctrl using new registers Change-Id: I907a0b599ef65061360c215580f96f59b78b615b --- .../arm/imx233/creative-zenxfi2/lcd-zenxfi2.c | 4 +- .../arm/imx233/creative-zenxfi3/lcd-zenxfi3.c | 4 +- firmware/target/arm/imx233/pinctrl-imx233.c | 20 ++++---- firmware/target/arm/imx233/pinctrl-imx233.h | 56 ++++++++-------------- .../arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c | 10 ++-- 5 files changed, 40 insertions(+), 54 deletions(-) (limited to 'firmware') diff --git a/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c b/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c index 63b033a8a9..4f5033e3d3 100644 --- a/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c +++ b/firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c @@ -66,11 +66,11 @@ static void setup_lcd_pins(bool use_lcdif) imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ - __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ } else { - __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ imx233_enable_gpio_output_mask(1, 0x3ffffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,dotclk,enable,hsync,vsync} */ imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ diff --git a/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c b/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c index 668f1f7c1a..bc669d1a60 100644 --- a/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c +++ b/firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c @@ -65,11 +65,11 @@ static void setup_lcd_pins(bool use_lcdif) imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ - __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ } else { - __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ imx233_enable_gpio_output_mask(1, 0x2bfffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,enable,vsync} */ imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ diff --git a/firmware/target/arm/imx233/pinctrl-imx233.c b/firmware/target/arm/imx233/pinctrl-imx233.c index d667e8d25c..3d8a6cfe54 100644 --- a/firmware/target/arm/imx233/pinctrl-imx233.c +++ b/firmware/target/arm/imx233/pinctrl-imx233.c @@ -66,7 +66,7 @@ static pin_irq_cb_t pin_cb[3][32]; /* 3 banks, 32 pins/bank */ static void INT_GPIO(int bank) { - uint32_t fire = HW_PINCTRL_IRQSTAT(bank) & HW_PINCTRL_IRQEN(bank); + uint32_t fire = HW_PINCTRL_IRQSTATn(bank) & HW_PINCTRL_IRQENn(bank); for(int pin = 0; pin < 32; pin++) if(fire & (1 << pin)) { @@ -95,22 +95,22 @@ void INT_GPIO2(void) void imx233_setup_pin_irq(int bank, int pin, bool enable_int, bool level, bool polarity, pin_irq_cb_t cb) { - __REG_CLR(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; - __REG_CLR(HW_PINCTRL_IRQEN(bank)) = 1 << pin; - __REG_CLR(HW_PINCTRL_IRQSTAT(bank))= 1 << pin; + HW_PINCTRL_PIN2IRQn_CLR(bank) = 1 << pin; + HW_PINCTRL_IRQENn_CLR(bank) = 1 << pin; + HW_PINCTRL_IRQSTATn_CLR(bank) = 1 << pin; pin_cb[bank][pin] = cb; if(enable_int) { if(level) - __REG_SET(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; + HW_PINCTRL_IRQLEVELn_SET(bank) = 1 << pin; else - __REG_CLR(HW_PINCTRL_IRQLEVEL(bank)) = 1 << pin; + HW_PINCTRL_IRQLEVELn_CLR(bank) = 1 << pin; if(polarity) - __REG_SET(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; + HW_PINCTRL_IRQPOLn_SET(bank) = 1 << pin; else - __REG_CLR(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; - __REG_SET(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; - __REG_SET(HW_PINCTRL_IRQEN(bank)) = 1 << pin; + HW_PINCTRL_IRQPOLn_CLR(bank) = 1 << pin; + HW_PINCTRL_PIN2IRQn_SET(bank) = 1 << pin; + HW_PINCTRL_IRQENn_SET(bank) = 1 << pin; imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true); } } diff --git a/firmware/target/arm/imx233/pinctrl-imx233.h b/firmware/target/arm/imx233/pinctrl-imx233.h index 5b4b9c4cd5..82ed47d57e 100644 --- a/firmware/target/arm/imx233/pinctrl-imx233.h +++ b/firmware/target/arm/imx233/pinctrl-imx233.h @@ -24,26 +24,12 @@ #define __PINCTRL_IMX233_H__ #include "config.h" +#include "system.h" +#include "regs/regs-pinctrl.h" // set to debug pinctrl use #define IMX233_PINCTRL_DEBUG -#define HW_PINCTRL_BASE 0x80018000 - -#define HW_PINCTRL_CTRL (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x0)) -#define HW_PINCTRL_MUXSEL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x100 + (i) * 0x10)) -#define HW_PINCTRL_DRIVE(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x200 + (i) * 0x10)) -#define HW_PINCTRL_PULL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x400 + (i) * 0x10)) -#define HW_PINCTRL_DOUT(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x500 + (i) * 0x10)) -#define HW_PINCTRL_DIN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x600 + (i) * 0x10)) -#define HW_PINCTRL_DOE(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x700 + (i) * 0x10)) -#define HW_PINCTRL_PIN2IRQ(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x800 + (i) * 0x10)) -#define HW_PINCTRL_IRQEN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10)) -#define HW_PINCTRL_IRQEN(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0x900 + (i) * 0x10)) -#define HW_PINCTRL_IRQLEVEL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xa00 + (i) * 0x10)) -#define HW_PINCTRL_IRQPOL(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xb00 + (i) * 0x10)) -#define HW_PINCTRL_IRQSTAT(i) (*(volatile uint32_t *)(HW_PINCTRL_BASE + 0xc00 + (i) * 0x10)) - #define PINCTRL_FUNCTION_MAIN 0 #define PINCTRL_FUNCTION_ALT1 1 #define PINCTRL_FUNCTION_ALT2 2 @@ -72,72 +58,72 @@ typedef void (*pin_irq_cb_t)(int bank, int pin); static inline void imx233_pinctrl_init(void) { - __REG_CLR(HW_PINCTRL_CTRL) = __BLOCK_CLKGATE | __BLOCK_SFTRST; + HW_PINCTRL_CTRL_CLR = BM_OR2(PINCTRL_CTRL, CLKGATE, SFTRST); } static inline void imx233_set_pin_drive_strength(unsigned bank, unsigned pin, unsigned strength) { - __REG_CLR(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = 3 << (4 * (pin % 8)); - __REG_SET(HW_PINCTRL_DRIVE(4 * bank + pin / 8)) = strength << (4 * (pin % 8)); + HW_PINCTRL_DRIVEn_CLR(4 * bank + pin / 8) = 3 << (4 * (pin % 8)); + HW_PINCTRL_DRIVEn_SET(4 * bank + pin / 8) = strength << (4 * (pin % 8)); } static inline void imx233_enable_gpio_output(unsigned bank, unsigned pin, bool enable) { - if(enable) - __REG_SET(HW_PINCTRL_DOE(bank)) = 1 << pin; + if(enable) + HW_PINCTRL_DOEn_SET(bank) = 1 << pin; else - __REG_CLR(HW_PINCTRL_DOE(bank)) = 1 << pin; + HW_PINCTRL_DOEn_CLR(bank) = 1 << pin; } static inline void imx233_enable_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool enable) { if(enable) - __REG_SET(HW_PINCTRL_DOE(bank)) = pin_mask; + HW_PINCTRL_DOEn_SET(bank) = pin_mask; else - __REG_CLR(HW_PINCTRL_DOE(bank)) = pin_mask; + HW_PINCTRL_DOEn_CLR(bank) = pin_mask; } static inline void imx233_set_gpio_output(unsigned bank, unsigned pin, bool value) { if(value) - __REG_SET(HW_PINCTRL_DOUT(bank)) = 1 << pin; + HW_PINCTRL_DOUTn_SET(bank) = 1 << pin; else - __REG_CLR(HW_PINCTRL_DOUT(bank)) = 1 << pin; + HW_PINCTRL_DOUTn_CLR(bank) = 1 << pin; } static inline void imx233_set_gpio_output_mask(unsigned bank, uint32_t pin_mask, bool value) { if(value) - __REG_SET(HW_PINCTRL_DOUT(bank)) = pin_mask; + HW_PINCTRL_DOUTn_SET(bank) = pin_mask; else - __REG_CLR(HW_PINCTRL_DOUT(bank)) = pin_mask; + HW_PINCTRL_DOUTn_CLR(bank) = pin_mask; } static inline uint32_t imx233_get_gpio_input_mask(unsigned bank, uint32_t pin_mask) { - return HW_PINCTRL_DIN(bank) & pin_mask; + return HW_PINCTRL_DINn(bank) & pin_mask; } static inline void imx233_set_pin_function(unsigned bank, unsigned pin, unsigned function) { - __REG_CLR(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = 3 << (2 * (pin % 16)); - __REG_SET(HW_PINCTRL_MUXSEL(2 * bank + pin / 16)) = function << (2 * (pin % 16)); + HW_PINCTRL_MUXSELn_CLR(2 * bank + pin / 16) = 3 << (2 * (pin % 16)); + HW_PINCTRL_MUXSELn_SET(2 * bank + pin / 16) = function << (2 * (pin % 16)); } static inline void imx233_enable_pin_pullup(unsigned bank, unsigned pin, bool enable) { if(enable) - __REG_SET(HW_PINCTRL_PULL(bank)) = 1 << pin; + HW_PINCTRL_PULLn_SET(bank) = 1 << pin; else - __REG_CLR(HW_PINCTRL_PULL(bank)) = 1 << pin; + HW_PINCTRL_PULLn_CLR(bank) = 1 << pin; } static inline void imx233_enable_pin_pullup_mask(unsigned bank, uint32_t pin_msk, bool enable) { if(enable) - __REG_SET(HW_PINCTRL_PULL(bank)) = pin_msk; + HW_PINCTRL_PULLn_SET(bank) = pin_msk; else - __REG_CLR(HW_PINCTRL_PULL(bank)) = pin_msk; + HW_PINCTRL_PULLn_CLR(bank) = pin_msk; } /** On irq, the pin irq interrupt is disable and then cb is called; diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c index cfb1a4e0a5..bd584d1822 100644 --- a/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c +++ b/firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c @@ -84,12 +84,12 @@ static void setup_lcd_pins(bool use_lcdif) imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ - __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} */ } else { - __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} */ - imx233_enable_gpio_output_mask(1, 0x2bfffff, false); /* lcd_{d{0-17},reset,rs,wr,cs,enable,vsync} */ + HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} */ + HW_PINCTRL_DOEn_CLR(1) = 0x2bfffff; imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ imx233_set_pin_function(1, 19, PINCTRL_FUNCTION_GPIO); /* lcd_rs */ @@ -117,7 +117,7 @@ static void setup_lcd_pins_i80(bool i80) imx233_set_gpio_output_mask(1, (1 << 19) | (1 << 20) | (1 << 21) | (1 << 23), true); imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ - __REG_SET(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as GPIO */ + HW_PINCTRL_MUXSELn_SET(2) = 0xffffffff; /* lcd_d{0-15} as GPIO */ imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_GPIO); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_GPIO); /* lcd_d17 */ imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_GPIO); /* lcd_reset */ @@ -134,7 +134,7 @@ static void setup_lcd_pins_i80(bool i80) imx233_set_pin_function(1, 20, PINCTRL_FUNCTION_MAIN); /* lcd_wr */ imx233_set_pin_function(1, 21, PINCTRL_FUNCTION_MAIN); /* lcd_cs */ imx233_enable_gpio_output_mask(1, 0x3ffff, false); /* lcd_d{0-17} */ - __REG_CLR(HW_PINCTRL_MUXSEL(2)) = 0xffffffff; /* lcd_d{0-15} as lcd_d{0-15} */ + HW_PINCTRL_MUXSELn_CLR(2) = 0xffffffff; /* lcd_d{0-15} as lcd_d{0-15} */ imx233_set_pin_function(1, 16, PINCTRL_FUNCTION_MAIN); /* lcd_d16 */ imx233_set_pin_function(1, 17, PINCTRL_FUNCTION_MAIN); /* lcd_d17 */ imx233_set_pin_function(1, 18, PINCTRL_FUNCTION_MAIN); /* lcd_reset */ -- cgit v1.2.3