From 8d234fc9a3765fcfd2376c3cf63f10f3cfe1d6f9 Mon Sep 17 00:00:00 2001 From: Bertrik Sikken Date: Sat, 6 Feb 2010 14:33:40 +0000 Subject: as3525: add a few more CGU_PERI definitions git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24537 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/as3525.h | 5 +++-- firmware/target/arm/as3525/system-as3525.c | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'firmware') diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index f1e51e0fb5..3c0c2a3ecf 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h @@ -219,6 +219,8 @@ CE lines #define CGU_VIC_CLOCK_ENABLE ( 1 << 23 ) /* vic */ /* --- are disabled after reset --- */ +#define CGU_EXTMEM_CLOCK_ENABLE ( 1 << 27 ) /* external memory */ +#define CGU_EXTMEMIF_CLOCK_ENABLE ( 1 << 26 ) /* ext mem AHB IF */ #define CGU_DMA_CLOCK_ENABLE ( 1 << 22 ) /* dma */ #define CGU_USB_CLOCK_ENABLE ( 1 << 21 ) /* usb */ #define CGU_I2SOUT_APB_CLOCK_ENABLE ( 1 << 20 ) /* i2sout */ @@ -234,8 +236,7 @@ CE lines #define CGU_SSP_CLOCK_ENABLE ( 1 << 10 ) /* ssp */ #define CGU_TIMER1_CLOCK_ENABLE ( 1 << 9 ) /* timer 1 */ #define CGU_TIMER2_CLOCK_ENABLE ( 1 << 8 ) /* timer 2 */ -#define CGU_TIMERIF_CLOCK_ENABLE ( 1 << 7 ) /* timer -interface */ +#define CGU_TIMERIF_CLOCK_ENABLE ( 1 << 7 ) /* timer interface */ /** ------------------------------------------------------------------ * Number of cycles to wait before cgu is safely locked. diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 6c3299eea3..23c65ae041 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -171,7 +171,7 @@ static void sdram_delay(void) /* Use the same initialization than OF */ static void sdram_init(void) { - CGU_PERI |= (1<<26)|(1<<27); /* extmem & extmem intf clocks */ + CGU_PERI |= (CGU_EXTMEM_CLOCK_ENABLE|CGU_EXTMEMIF_CLOCK_ENABLE); MPMC_CONTROL = 0x1; /* enable MPMC */ @@ -301,7 +301,7 @@ void system_init(void) (AS3525_FCLK_PREDIV << 2) | AS3525_FCLK_SEL); /* Set PCLK frequency */ - CGU_PERI = ((CGU_PERI & 0xffffff80) | /* reset divider bits 0:6 */ + CGU_PERI = ((CGU_PERI & ~0x7F) | /* reset divider bits 0:6 */ (AS3525_PCLK_DIV0 << 2) | (AS3525_PCLK_DIV1 << 6) | AS3525_PCLK_SEL); -- cgit v1.2.3