From 7cb49cfb33647941d4a706675832bfc57a4e27cf Mon Sep 17 00:00:00 2001
From: Aidan MacDonald <amachronic@protonmail.com>
Date: Fri, 4 Mar 2022 16:30:33 +0000
Subject: x1000: spl: split off NAND storage to separate file

Just tidying. No functional changes.

Change-Id: I8aa85c789d1a6bd357797c6c95e38a7325eba809
---
 firmware/SOURCES                                   |  3 ++
 .../target/mips/ingenic_x1000/spl-nand-x1000.c     | 50 ++++++++++++++++++++++
 firmware/target/mips/ingenic_x1000/spl-x1000.c     | 25 -----------
 3 files changed, 53 insertions(+), 25 deletions(-)
 create mode 100644 firmware/target/mips/ingenic_x1000/spl-nand-x1000.c

(limited to 'firmware')

diff --git a/firmware/SOURCES b/firmware/SOURCES
index b72a7521e9..6c8f7b957c 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -1711,6 +1711,7 @@ target/mips/ingenic_x1000/fiiom3k/button-fiiom3k.c
 target/mips/ingenic_x1000/fiiom3k/lcd-fiiom3k.c
 target/mips/ingenic_x1000/fiiom3k/power-fiiom3k.c
 target/mips/ingenic_x1000/fiiom3k/spl-fiiom3k.c
+target/mips/ingenic_x1000/spl-nand-x1000.c
 #endif /* FIIO_M3K */
 
 #if defined(SHANLING_Q1)
@@ -1720,6 +1721,7 @@ target/mips/ingenic_x1000/shanlingq1/button-shanlingq1.c
 target/mips/ingenic_x1000/shanlingq1/lcd-shanlingq1.c
 target/mips/ingenic_x1000/shanlingq1/power-shanlingq1.c
 target/mips/ingenic_x1000/shanlingq1/spl-shanlingq1.c
+target/mips/ingenic_x1000/spl-nand-x1000.c
 #endif /* SHANLING_Q1 */
 
 #if defined(EROS_QN)
@@ -1729,6 +1731,7 @@ target/mips/ingenic_x1000/erosqnative/button-erosqnative.c
 target/mips/ingenic_x1000/erosqnative/lcd-erosqnative.c
 target/mips/ingenic_x1000/erosqnative/power-erosqnative.c
 target/mips/ingenic_x1000/erosqnative/spl-erosqnative.c
+target/mips/ingenic_x1000/spl-nand-x1000.c
 #endif /* EROS_QN */
 
 #if defined(LYRE_PROTO1)
diff --git a/firmware/target/mips/ingenic_x1000/spl-nand-x1000.c b/firmware/target/mips/ingenic_x1000/spl-nand-x1000.c
new file mode 100644
index 0000000000..82a05abf75
--- /dev/null
+++ b/firmware/target/mips/ingenic_x1000/spl-nand-x1000.c
@@ -0,0 +1,50 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2021 Aidan MacDonald
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "spl-x1000.h"
+#include "gpio-x1000.h"
+#include "nand-x1000.h"
+
+static nand_drv* ndrv = NULL;
+
+int spl_storage_open(void)
+{
+    /* We need to assign the GPIOs manually */
+    gpioz_configure(GPIO_A, 0x3f << 26, GPIOF_DEVICE(1));
+
+    /* Allocate NAND driver manually in DRAM */
+    ndrv = spl_alloc(sizeof(nand_drv));
+    ndrv->page_buf = spl_alloc(NAND_DRV_MAXPAGESIZE);
+    ndrv->scratch_buf = spl_alloc(NAND_DRV_SCRATCHSIZE);
+    ndrv->refcount = 0;
+
+    return nand_open(ndrv);
+}
+
+void spl_storage_close(void)
+{
+    nand_close(ndrv);
+}
+
+int spl_storage_read(uint32_t addr, uint32_t length, void* buffer)
+{
+    return nand_read_bytes(ndrv, addr, length, buffer);
+}
diff --git a/firmware/target/mips/ingenic_x1000/spl-x1000.c b/firmware/target/mips/ingenic_x1000/spl-x1000.c
index 499b46ce62..ac3a17f69f 100644
--- a/firmware/target/mips/ingenic_x1000/spl-x1000.c
+++ b/firmware/target/mips/ingenic_x1000/spl-x1000.c
@@ -47,7 +47,6 @@
 #endif
 
 static void* heap = (void*)(X1000_SDRAM_BASE + X1000_SDRAM_SIZE);
-static nand_drv* ndrv = NULL;
 
 void* spl_alloc(size_t count)
 {
@@ -56,30 +55,6 @@ void* spl_alloc(size_t count)
     return heap;
 }
 
-int spl_storage_open(void)
-{
-    /* We need to assign the GPIOs manually */
-    gpioz_configure(GPIO_A, 0x3f << 26, GPIOF_DEVICE(1));
-
-    /* Allocate NAND driver manually in DRAM */
-    ndrv = spl_alloc(sizeof(nand_drv));
-    ndrv->page_buf = spl_alloc(NAND_DRV_MAXPAGESIZE);
-    ndrv->scratch_buf = spl_alloc(NAND_DRV_SCRATCHSIZE);
-    ndrv->refcount = 0;
-
-    return nand_open(ndrv);
-}
-
-void spl_storage_close(void)
-{
-    nand_close(ndrv);
-}
-
-int spl_storage_read(uint32_t addr, uint32_t length, void* buffer)
-{
-    return nand_read_bytes(ndrv, addr, length, buffer);
-}
-
 /* Used by:
  * - FiiO M3K
  * - Shanling Q1
-- 
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