From e94d1b0ab0042b71a4e0c7609b412185c53dcded Mon Sep 17 00:00:00 2001 From: Marcin Bukat Date: Tue, 24 Jan 2012 11:53:22 +0100 Subject: MPIO HD200/HD300: Decrease ADC scanrate. The adclk is decreased 4x. This solves problems with battery readout drop during system startup. Change-Id: I46d7c4b9ffcfdc812a6dd2a932c9e397d33c1168 --- firmware/target/coldfire/mpio/adc-mpio.c | 30 +++++------------------------ firmware/target/coldfire/mpio/system-mpio.c | 12 ++++++------ 2 files changed, 11 insertions(+), 31 deletions(-) (limited to 'firmware/target') diff --git a/firmware/target/coldfire/mpio/adc-mpio.c b/firmware/target/coldfire/mpio/adc-mpio.c index 92b9479279..4c796d5d15 100644 --- a/firmware/target/coldfire/mpio/adc-mpio.c +++ b/firmware/target/coldfire/mpio/adc-mpio.c @@ -28,17 +28,11 @@ volatile unsigned short adc_data[NUM_ADC_CHANNELS] IBSS_ATTR; -/* Reading takes 4096 adclk ticks - * 1) tick task is created that enables ADC interrupt - * 2) On interrupt single channel is readed and - * ADC is prepared for next channel - * 3) When all 4 channels are scanned ADC interrupt is disabled - */ - void ADC(void) __attribute__ ((interrupt_handler,section(".icode"))); void ADC(void) { static unsigned char channel IBSS_ATTR; + /* read current value */ adc_data[(channel&0x03)] = ADVALUE; @@ -48,15 +42,10 @@ void ADC(void) * ADCONFIG is 16bit wide so we have to shift data by 16bits left * thats why we shift <<24 instead of <<8 */ - channel++; and_l(~(0x03<<24),&ADCONFIG); or_l( (((channel&0x03) << 8 )|(1<<7))<<16, &ADCONFIG); - - if ( (channel & 0x03) == 0 ) - /* disable ADC interrupt */ - and_l((~(1<<6))<<16,&ADCONFIG); } unsigned short adc_scan(int channel) @@ -65,12 +54,6 @@ unsigned short adc_scan(int channel) return adc_data[(channel&0x03)]; } -void adc_tick(void) -{ - /* enable ADC interrupt */ - or_l( ((1<<6))<<16, &ADCONFIG); -} - void adc_init(void) { /* GPIO38 GPIO39 */ @@ -79,19 +62,16 @@ void adc_init(void) /* ADOUT_SEL = 01 * SOURCE SELECT = 000 * CLEAR INTERRUPT FLAG - * ENABLE INTERRUPT = 0 + * ENABLE INTERRUPT = 1 * ADOUT_DRIVE = 00 - * ADCLK_SEL = 011 (busclk/8) + * ADCLK_SEL = 011 (busclk/64) */ - ADCONFIG = (1<<10)|(1<<8)|(1<<7)|0x03; + ADCONFIG = (1<<10)|(1<<7)|(1<<6)|0x06; /* ADC interrupt level 4.0 */ or_l((4<<28), &INTPRI8); - /* create tick task which enables ADC interrupt */ - tick_add_task(adc_tick); - /* let the interrupt handler fill readout array */ - sleep(2); + sleep(HZ/10); } diff --git a/firmware/target/coldfire/mpio/system-mpio.c b/firmware/target/coldfire/mpio/system-mpio.c index ef291dbe0d..846f77b56e 100644 --- a/firmware/target/coldfire/mpio/system-mpio.c +++ b/firmware/target/coldfire/mpio/system-mpio.c @@ -80,8 +80,8 @@ void cf_set_cpu_frequency(long frequency) /* BUFEN2 enable on /CS2 | CS2Post 1 clock| CS2Pre 3 clocks*/ IDECONFIG2 = (1<<18)|(1<<16)|(1<<8)|(1<<0); /* TA /CS2 enable + CS2wait */ - and_l(~(0x07<<16), &ADCONFIG); - or_l((0x05)<<16, &ADCONFIG); /* adclk = busclk/32 */ + and_l(~(0x0f<<16), &ADCONFIG); + or_l((0x08)<<16, &ADCONFIG); /* adclk = busclk/256 */ break; case CPUFREQ_NORMAL: @@ -100,8 +100,8 @@ void cf_set_cpu_frequency(long frequency) IDECONFIG1 = (1<<28)|(1<<20)|(1<<18)|(1<<13)|(1<<10); IDECONFIG2 = (1<<18)|(1<<16); - and_l(~(0x07<<16), &ADCONFIG); - or_l((0x03)<<16, &ADCONFIG); /* adclk = busclk/8 */ + and_l(~(0x0f<<16), &ADCONFIG); + or_l((0x06)<<16, &ADCONFIG); /* adclk = busclk/64 */ break; default: @@ -118,8 +118,8 @@ void cf_set_cpu_frequency(long frequency) IDECONFIG1 = (1<<28)|(1<<20)|(1<<18)|(1<<13)|(1<<10); IDECONFIG2 = (1<<18)|(1<<16); - and_l(~(0x07<<16), &ADCONFIG); - or_l((0x01)<<16, &ADCONFIG); /* adclk = busclk/2 */ + and_l(~(0x0f<<16), &ADCONFIG); + or_l((0x04)<<16, &ADCONFIG); /* adclk = busclk/16 */ break; } } -- cgit v1.2.3