From b1dccc47fd8488cef147961f247f0e34d57a0399 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Mon, 23 Feb 2009 04:33:33 +0000 Subject: PP502x: Improve accuracy of header file. It looks as though DMA channels share the same interrupt enable (tested that 0 and 2 do at least). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20089 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/pcm-pp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'firmware/target') diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index f441bb82ce..ce30908b0e 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c @@ -328,7 +328,7 @@ void pcm_play_lock(void) if (++dma_play_data.locked == 1) { #ifdef CPU_PP502x - CPU_INT_DIS = DMA0_MASK; + CPU_INT_DIS = DMA_MASK; #else IIS_IRQTX_REG &= ~IIS_IRQTX; #endif @@ -343,7 +343,7 @@ void pcm_play_unlock(void) if (--dma_play_data.locked == 0 && dma_play_data.state != 0) { #ifdef CPU_PP502x - CPU_INT_EN = DMA0_MASK; + CPU_INT_EN = DMA_MASK; #else IIS_IRQTX_REG |= IIS_IRQTX; #endif @@ -493,8 +493,8 @@ void pcm_play_dma_init(void) #ifdef CPU_PP502x /* Enable DMA controller */ DMA_MASTER_CONTROL |= DMA_MASTER_CONTROL_EN; - /* FIQ priority for DMA0 */ - CPU_INT_PRIORITY |= DMA0_MASK; + /* FIQ priority for DMA */ + CPU_INT_PRIORITY |= DMA_MASK; /* Enable request?? Not setting or clearing everything doesn't seem to * prevent it operating. Perhaps important for reliability (how requests * are handled). */ -- cgit v1.2.3