From 2f785c7797d0a40a0c797208cbcc753ddfe9193a Mon Sep 17 00:00:00 2001 From: Solomon Peachy Date: Thu, 1 Apr 2021 10:52:51 -0400 Subject: PP: More cache invalidation fixes Take into account the size of the pointer in the loop termination condition. Change-Id: Ib4f7625ef143149a0d691a2109bad67aece6241c --- firmware/target/arm/pp/system-pp502x.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'firmware/target') diff --git a/firmware/target/arm/pp/system-pp502x.c b/firmware/target/arm/pp/system-pp502x.c index b1e791ec59..d6dfad1b24 100644 --- a/firmware/target/arm/pp/system-pp502x.c +++ b/firmware/target/arm/pp/system-pp502x.c @@ -253,15 +253,15 @@ static void ICODE_ATTR cache_invalidate_special(void) if (CURRENT_CORE == CPU) { for (p = &CACHE_STATUS_BASE_CPU; - p < (&CACHE_STATUS_BASE_CPU) + CACHE_SIZE; - p += CACHEALIGN_BITS) /* sizeof(p) * CACHEALIGN_BITS */ + p < (&CACHE_STATUS_BASE_CPU) + CACHE_SIZE/sizeof(*p); + p += CACHEALIGN_SIZE/sizeof(*p)) *p = CACHE_LINE_VALID | CACHE_ADDRESS_MASK; } else { for (p = &CACHE_STATUS_BASE_COP; - p < (&CACHE_STATUS_BASE_COP) + CACHE_SIZE; - p += CACHEALIGN_BITS) + p < (&CACHE_STATUS_BASE_COP) + CACHE_SIZE/sizeof(*p); + p += CACHEALIGN_SIZE/sizeof(*p)) *p = CACHE_LINE_VALID | CACHE_ADDRESS_MASK; } } -- cgit v1.2.3