From 036168cbf96d455eea927bcf1701627e81e68a3a Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Sat, 14 Apr 2007 11:15:43 +0000 Subject: PP5020/PP5024: Add ASM optimized inline current_core. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13155 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/system-target.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'firmware/target') diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h index 2b72e9293e..0dd02a8704 100644 --- a/firmware/target/arm/system-target.h +++ b/firmware/target/arm/system-target.h @@ -36,7 +36,27 @@ static inline void udelay(unsigned usecs) while (TIME_BEFORE(USEC_TIMER, stop)); } +#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 +static inline unsigned int current_core(void) +{ + /* + * PROCESSOR_ID seems to be 32-bits: + * CPU = 0x55555555 = |01010101|01010101|01010101|01010101| + * COP = 0xaaaaaaaa = |10101010|10101010|10101010|10101010| + * ^ + */ + unsigned int core; + asm volatile ( + "ldr %0, =0x60000000 \r\n" /* PROCESSOR_ID */ + "ldrb %0, [%0] \r\n" /* Just load the LSB */ + "mov %0, %0, lsr #7 \r\n" /* Bit 7 => index */ + : "=&r"(core) /* CPU=0, COP=1 */ + ); + return core; +} +#else unsigned int current_core(void); +#endif #if CONFIG_CPU != PP5002 -- cgit v1.2.3