From 975261f003ab7c8bc917a932f5c6fc657ea78143 Mon Sep 17 00:00:00 2001
From: Maurus Cuelenaere <mcuelenaere@gmail.com>
Date: Wed, 16 Jul 2008 15:25:35 +0000
Subject: Fix the LCD bug!

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18071 a1c6a512-1295-4272-9138-f99709370657
---
 .../target/mips/ingenic_jz47xx/ata-nand-jz4740.c   | 24 ++++++++++++++++++++++
 firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c   | 13 +++++++++---
 .../ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c     | 13 ++++++------
 .../target/mips/ingenic_jz47xx/system-jz4740.c     |  2 +-
 4 files changed, 42 insertions(+), 10 deletions(-)

(limited to 'firmware/target/mips')

diff --git a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
index ad053c7deb..00165b2d2d 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
@@ -66,3 +66,27 @@ int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count, const v
     (void)buf;
     return 0;
 }
+
+static int jz_device_ready(void)
+{
+	int ready, wait = 10;
+	while (wait--);
+	ready = __gpio_get_pin(32*2+30);
+	return ready;
+}
+
+int ata_init(void)
+{
+    /*
+     * EMC setup
+     */
+    
+	/* Set NFE bit */
+	REG_EMC_NFCSR |= EMC_NFCSR_NFE1;
+
+	/* Read/Write timings */
+	REG_EMC_SMCR1 = (EMC_SMCR_BL_4 | EMC_SMCR_BW_8BIT | 4 << EMC_SMCR_TAS_BIT
+                    | 4 << EMC_SMCR_TAH_BIT | 4 << EMC_SMCR_TBP_BIT | 4 << EMC_SMCR_TAW_BIT
+                    | 4 << EMC_SMCR_STRV_BIT);
+    return 0;
+}
diff --git a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
index 429178aeee..907351c64e 100644
--- a/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/lcd-jz4740.c
@@ -49,6 +49,13 @@ bool lcd_enabled(void)
     return _lcd_on;
 }
 
+void lcd_copy_buffer_rect(fb_data* dest, fb_data* src, int width, int height)
+{
+    int i;
+    for(i=0; i<width*height; i++)
+        *dest++ = *src++;
+}
+
 #define LCDADDR(x, y) ((unsigned int)&lcd_framebuffer[(y)][(x)])
 #define LCD_UNCACHED(addr)	((unsigned int)(addr) | 0xA0000000)
 
@@ -57,11 +64,12 @@ void lcd_update_rect(int x, int y, int width, int height)
 {
     /* HACKY... */
     x=0; y=0; width=400; height=240;
+    
     lcd_set_target(x, y, width-1, height-1);
     
     REG_DMAC_DCCSR(0) = 0;
     REG_DMAC_DRSR(0) = DMAC_DRSR_RS_SLCD; /* source = SLCD */
-    REG_DMAC_DSAR(0) = LCDADDR(x,y) & 0x1FFFFFFF;
+    REG_DMAC_DSAR(0) = LCDADDR(x, y) & 0x1FFFFFFF;
 #if 0
     REG_DMAC_DTAR(0) = LCD_UNCACHED(SLCD_FIFO);
 #else
@@ -73,13 +81,12 @@ void lcd_update_rect(int x, int y, int width, int height)
                        | DMAC_DCMD_DWDH_16 | DMAC_DCMD_DS_16BIT);             /* | (2 << 12) | (3 << 8) */
     REG_DMAC_DCCSR(0) = (DMAC_DCCSR_NDES | DMAC_DCCSR_EN);                     /* (1 << 31) | (1 << 0) */
     
-    jz_flush_icache();
+    jz_flush_dcache();
     
     REG_DMAC_DMACR = DMAC_DMACR_DMAE;
 
     while( !(REG_DMAC_DCCSR(0) & DMAC_DCCSR_TT) )
         asm("nop");
-    
     //REG_DMAC_DCCSR(0) &= ~DMAC_DCCSR_TT;
 }
 
diff --git a/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c b/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c
index e99bc178f1..33809bb50f 100644
--- a/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c
+++ b/firmware/target/mips/ingenic_jz47xx/onda_vx747/lcd-onda_vx747.c
@@ -69,7 +69,11 @@ static void _display_init(void)
     
     SLCD_SEND_COMMAND(REG_DRIVER_OUTPUT, 0x100);
     SLCD_SEND_COMMAND(REG_LCD_DR_WAVE_CTRL, 0x100);
-    SLCD_SEND_COMMAND(REG_ENTRY_MODE, (ENTRY_MODE_BGR | ENTRY_MODE_VID | ENTRY_MODE_HID));
+#if CONFIG_ORIENTATION == SCREEN_PORTRAIT
+    SLCD_SEND_COMMAND(REG_ENTRY_MODE, (ENTRY_MODE_BGR | ENTRY_MODE_VID | ENTRY_MODE_HID | ENTRY_MODE_HWM));
+#else
+    SLCD_SEND_COMMAND(REG_ENTRY_MODE, (ENTRY_MODE_BGR | ENTRY_MODE_VID | ENTRY_MODE_AM | ENTRY_MODE_HWM));
+#endif
     SLCD_SEND_COMMAND(REG_DISP_CTRL2, 0x503);
     SLCD_SEND_COMMAND(REG_DISP_CTRL3, 1);
     SLCD_SEND_COMMAND(REG_LPCTRL, 0x10);
@@ -193,15 +197,12 @@ static void _set_lcd_clock(void)
 	int pll_div;
     
     __cpm_stop_lcd();
-	pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source,0:pllout/2 1: pllout */
+	pll_div = ( REG_CPM_CPCCR & CPM_CPCCR_PCS ); /* clock source, 0:pllout/2 1: pllout */
 	pll_div = pll_div ? 1 : 2 ;
 	val = ( __cpm_get_pllout()/pll_div ) / 336000000;
 	val--;
 	if ( val > 0x1ff )
-    {
-		//printf("CPM_LPCDR too large, set it to 0x1ff\n");
-		val = 0x1ff;
-	}
+		val = 0x1ff; /* CPM_LPCDR is too large, set it to 0x1ff */
 	__cpm_set_pixdiv(val);
     __cpm_start_lcd();
 }
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
index ee50520243..2dca4619c0 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4740.c
@@ -26,7 +26,7 @@
 
 void intr_handler(void)
 {
-    _printf("Interrupt!");
+    //printf("Interrupt!");
     return;
 }
 
-- 
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