From 3ec66893e377b088c1284d2d23adb2aeea6d7965 Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Sat, 27 Feb 2021 22:08:58 +0000 Subject: New port: FiiO M3K on bare metal Change-Id: I7517e7d5459e129dcfc9465c6fbd708619888fbe --- firmware/target/mips/ingenic_x1000/x1000/ost.h | 141 +++++++++++++++++++++++++ 1 file changed, 141 insertions(+) create mode 100644 firmware/target/mips/ingenic_x1000/x1000/ost.h (limited to 'firmware/target/mips/ingenic_x1000/x1000/ost.h') diff --git a/firmware/target/mips/ingenic_x1000/x1000/ost.h b/firmware/target/mips/ingenic_x1000/x1000/ost.h new file mode 100644 index 0000000000..8f2619e0e7 --- /dev/null +++ b/firmware/target/mips/ingenic_x1000/x1000/ost.h @@ -0,0 +1,141 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * This file was automatically generated by headergen, DO NOT EDIT it. + * headergen version: 3.0.0 + * x1000 version: 1.0 + * x1000 authors: Aidan MacDonald + * + * Copyright (C) 2015 by the authors + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef __HEADERGEN_OST_H__ +#define __HEADERGEN_OST_H__ + +#include "macro.h" + +#define REG_OST_CTRL jz_reg(OST_CTRL) +#define JA_OST_CTRL (0xb2000000 + 0x0) +#define JT_OST_CTRL JIO_32_RW +#define JN_OST_CTRL OST_CTRL +#define JI_OST_CTRL +#define BP_OST_CTRL_PRESCALE2 3 +#define BM_OST_CTRL_PRESCALE2 0x38 +#define BV_OST_CTRL_PRESCALE2__BY_1 0x0 +#define BV_OST_CTRL_PRESCALE2__BY_4 0x1 +#define BV_OST_CTRL_PRESCALE2__BY_16 0x2 +#define BF_OST_CTRL_PRESCALE2(v) (((v) & 0x7) << 3) +#define BFM_OST_CTRL_PRESCALE2(v) BM_OST_CTRL_PRESCALE2 +#define BF_OST_CTRL_PRESCALE2_V(e) BF_OST_CTRL_PRESCALE2(BV_OST_CTRL_PRESCALE2__##e) +#define BFM_OST_CTRL_PRESCALE2_V(v) BM_OST_CTRL_PRESCALE2 +#define BP_OST_CTRL_PRESCALE1 0 +#define BM_OST_CTRL_PRESCALE1 0x7 +#define BV_OST_CTRL_PRESCALE1__BY_1 0x0 +#define BV_OST_CTRL_PRESCALE1__BY_4 0x1 +#define BV_OST_CTRL_PRESCALE1__BY_16 0x2 +#define BF_OST_CTRL_PRESCALE1(v) (((v) & 0x7) << 0) +#define BFM_OST_CTRL_PRESCALE1(v) BM_OST_CTRL_PRESCALE1 +#define BF_OST_CTRL_PRESCALE1_V(e) BF_OST_CTRL_PRESCALE1(BV_OST_CTRL_PRESCALE1__##e) +#define BFM_OST_CTRL_PRESCALE1_V(v) BM_OST_CTRL_PRESCALE1 + +#define REG_OST_ENABLE jz_reg(OST_ENABLE) +#define JA_OST_ENABLE (0xb2000000 + 0x4) +#define JT_OST_ENABLE JIO_32_RW +#define JN_OST_ENABLE OST_ENABLE +#define JI_OST_ENABLE +#define REG_OST_ENABLE_SET jz_reg(OST_ENABLE_SET) +#define JA_OST_ENABLE_SET (JA_OST_ENABLE + 0x30) +#define JT_OST_ENABLE_SET JIO_32_WO +#define JN_OST_ENABLE_SET OST_ENABLE +#define JI_OST_ENABLE_SET +#define REG_OST_ENABLE_CLR jz_reg(OST_ENABLE_CLR) +#define JA_OST_ENABLE_CLR (JA_OST_ENABLE + 0x34) +#define JT_OST_ENABLE_CLR JIO_32_WO +#define JN_OST_ENABLE_CLR OST_ENABLE +#define JI_OST_ENABLE_CLR +#define BP_OST_ENABLE_OST1 0 +#define BM_OST_ENABLE_OST1 0x1 +#define BF_OST_ENABLE_OST1(v) (((v) & 0x1) << 0) +#define BFM_OST_ENABLE_OST1(v) BM_OST_ENABLE_OST1 +#define BF_OST_ENABLE_OST1_V(e) BF_OST_ENABLE_OST1(BV_OST_ENABLE_OST1__##e) +#define BFM_OST_ENABLE_OST1_V(v) BM_OST_ENABLE_OST1 +#define BP_OST_ENABLE_OST2 1 +#define BM_OST_ENABLE_OST2 0x2 +#define BF_OST_ENABLE_OST2(v) (((v) & 0x1) << 1) +#define BFM_OST_ENABLE_OST2(v) BM_OST_ENABLE_OST2 +#define BF_OST_ENABLE_OST2_V(e) BF_OST_ENABLE_OST2(BV_OST_ENABLE_OST2__##e) +#define BFM_OST_ENABLE_OST2_V(v) BM_OST_ENABLE_OST2 + +#define REG_OST_CLEAR jz_reg(OST_CLEAR) +#define JA_OST_CLEAR (0xb2000000 + 0x8) +#define JT_OST_CLEAR JIO_32_RW +#define JN_OST_CLEAR OST_CLEAR +#define JI_OST_CLEAR +#define BP_OST_CLEAR_OST1 0 +#define BM_OST_CLEAR_OST1 0x1 +#define BF_OST_CLEAR_OST1(v) (((v) & 0x1) << 0) +#define BFM_OST_CLEAR_OST1(v) BM_OST_CLEAR_OST1 +#define BF_OST_CLEAR_OST1_V(e) BF_OST_CLEAR_OST1(BV_OST_CLEAR_OST1__##e) +#define BFM_OST_CLEAR_OST1_V(v) BM_OST_CLEAR_OST1 +#define BP_OST_CLEAR_OST2 1 +#define BM_OST_CLEAR_OST2 0x2 +#define BF_OST_CLEAR_OST2(v) (((v) & 0x1) << 1) +#define BFM_OST_CLEAR_OST2(v) BM_OST_CLEAR_OST2 +#define BF_OST_CLEAR_OST2_V(e) BF_OST_CLEAR_OST2(BV_OST_CLEAR_OST2__##e) +#define BFM_OST_CLEAR_OST2_V(v) BM_OST_CLEAR_OST2 + +#define REG_OST_1FLG jz_reg(OST_1FLG) +#define JA_OST_1FLG (0xb2000000 + 0xc) +#define JT_OST_1FLG JIO_32_RW +#define JN_OST_1FLG OST_1FLG +#define JI_OST_1FLG + +#define REG_OST_1MSK jz_reg(OST_1MSK) +#define JA_OST_1MSK (0xb2000000 + 0x10) +#define JT_OST_1MSK JIO_32_RW +#define JN_OST_1MSK OST_1MSK +#define JI_OST_1MSK + +#define REG_OST_1DFR jz_reg(OST_1DFR) +#define JA_OST_1DFR (0xb2000000 + 0x14) +#define JT_OST_1DFR JIO_32_RW +#define JN_OST_1DFR OST_1DFR +#define JI_OST_1DFR + +#define REG_OST_1CNT jz_reg(OST_1CNT) +#define JA_OST_1CNT (0xb2000000 + 0x18) +#define JT_OST_1CNT JIO_32_RW +#define JN_OST_1CNT OST_1CNT +#define JI_OST_1CNT + +#define REG_OST_2CNTH jz_reg(OST_2CNTH) +#define JA_OST_2CNTH (0xb2000000 + 0x1c) +#define JT_OST_2CNTH JIO_32_RW +#define JN_OST_2CNTH OST_2CNTH +#define JI_OST_2CNTH + +#define REG_OST_2CNTL jz_reg(OST_2CNTL) +#define JA_OST_2CNTL (0xb2000000 + 0x20) +#define JT_OST_2CNTL JIO_32_RW +#define JN_OST_2CNTL OST_2CNTL +#define JI_OST_2CNTL + +#define REG_OST_2CNTHB jz_reg(OST_2CNTHB) +#define JA_OST_2CNTHB (0xb2000000 + 0x24) +#define JT_OST_2CNTHB JIO_32_RW +#define JN_OST_2CNTHB OST_2CNTHB +#define JI_OST_2CNTHB + +#endif /* __HEADERGEN_OST_H__*/ -- cgit v1.2.3