From e85bc74b307365e9a7b4adab51d646638db12fbd Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Sat, 5 Jun 2021 00:12:01 +0100 Subject: x1000: GPIO refactor The GPIO API was pretty clunky and pin settings were decentralized, making it hard to see what was happening and making GPIO stuff look like a mess, frankly. Instead of passing clunky (port, pin) pairs everywhere, GPIOs are now identified with a single int. The extra overhead should be minimal as GPIO configuration is generally not on a performance-critical path. Pin assignments are now mostly consolidated in gpio-target.h and put in various tables so gpio_init() can assign most pins at boot time. Most drivers no longer need to touch GPIOs and basic pin I/O stuff can happen without config since pins are put into the right state. IRQ pins still need to be configured manually before use. Change-Id: Ic5326284b0b2a2f613e9e76a41cb50e24af3aa47 --- firmware/target/mips/ingenic_x1000/sfc-x1000.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'firmware/target/mips/ingenic_x1000/sfc-x1000.c') diff --git a/firmware/target/mips/ingenic_x1000/sfc-x1000.c b/firmware/target/mips/ingenic_x1000/sfc-x1000.c index 3f1cb25f07..c1ffb6a5e1 100644 --- a/firmware/target/mips/ingenic_x1000/sfc-x1000.c +++ b/firmware/target/mips/ingenic_x1000/sfc-x1000.c @@ -23,7 +23,6 @@ #include "kernel.h" #include "panic.h" #include "sfc-x1000.h" -#include "gpio-x1000.h" #include "irq-x1000.h" #include "x1000/sfc.h" #include "x1000/cpm.h" @@ -75,7 +74,6 @@ void sfc_unlock(void) void sfc_open(void) { - gpio_config(GPIO_A, 0x3f << 26, GPIO_DEVICE(1)); jz_writef(CPM_CLKGR, SFC(0)); jz_writef(SFC_GLB, OP_MODE_V(SLAVE), PHASE_NUM(1), THRESHOLD(FIFO_THRESH), WP_EN(1)); -- cgit v1.2.3