From 28c89386af8ea9d002bcc25483233053fe0e7525 Mon Sep 17 00:00:00 2001 From: amachronic Date: Tue, 6 Apr 2021 01:10:01 +0100 Subject: x1000: Improve NAND driver API - Proper error codes are now returned from all functions. These codes will be used by a host-side flash tool for error reporting. - nand_erase_block() was replaced by nand_erase_bytes(). The caller can't know how big an eraseblock is with the current API, so next best thing is to verify the correct alignment inside the call and reject the erase if it isn't properly aligned. - Fixed typo in nandcmd_block_erase() which would cause an SFC error to be interpreted as success. Yikes. Change-Id: Id4ac9b44fa7fc2fcb81ff19ba730df78457c0383 --- firmware/target/mips/ingenic_x1000/nand-x1000.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.h') diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h index 865feb38c5..f6709aaaf9 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.h +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h @@ -31,6 +31,7 @@ #include #include #include +#include "nand-x1000-err.h" /* Chip supports quad I/O for page read/write */ #define NANDCHIP_FLAG_QUAD 0x01 @@ -123,7 +124,7 @@ extern int nand_enable_writes(bool en); /* Byte-based NAND operations */ extern int nand_read_bytes(uint32_t byteaddr, int count, void* buf); extern int nand_write_bytes(uint32_t byteaddr, int count, const void* buf); -extern int nand_erase_block(uint32_t byteaddr); +extern int nand_erase_bytes(uint32_t byteaddr, int count); /* NAND command numbers */ #define NAND_CMD_READ_ID 0x9f -- cgit v1.2.3