From cc017f211a338a68a571226e589ce34e47fc8ad3 Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Tue, 7 Jun 2022 17:35:40 +0100 Subject: x1000: support 2nd device ID byte for NAND flash Some components have additional ID bytes. Add support for an optional 2nd device ID byte during the identification routine. Change-Id: I5bbad73fb57004067c6f13f223f7bf4d43ff7849 --- firmware/target/mips/ingenic_x1000/nand-x1000.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.c') diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.c b/firmware/target/mips/ingenic_x1000/nand-x1000.c index 18d548ba8c..382fd761b3 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.c +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.c @@ -98,21 +98,24 @@ static bool identify_chip(nand_drv* drv) * - 1 byte address, no dummy byte * - no address byte, 1 byte dummy * - * Right now there is only a need for the 2nd variation, as that is - * the method used by the ATO25D1GA. - * - * Some chips also output more than 2 ID bytes. + * Currently we use the 2nd method, aka. address read ID. */ - sfc_exec(NANDCMD_READID(1, 0), 0, drv->scratch_buf, 2|SFC_READ); + sfc_exec(NANDCMD_READID(1, 0), 0, drv->scratch_buf, 4|SFC_READ); drv->mf_id = drv->scratch_buf[0]; drv->dev_id = drv->scratch_buf[1]; + drv->dev_id2 = drv->scratch_buf[2]; for(size_t i = 0; i < nr_supported_nand_chips; ++i) { const nand_chip* chip = &supported_nand_chips[i]; - if(chip->mf_id == drv->mf_id && chip->dev_id == drv->dev_id) { - drv->chip = chip; - return true; - } + if(chip->mf_id != drv->mf_id || chip->dev_id != drv->dev_id) + continue; + + if((chip->flags & NAND_CHIPFLAG_HAS_DEVID2) && + chip->dev_id2 != drv->dev_id2) + continue; + + drv->chip = chip; + return true; } return false; -- cgit v1.2.3