From 3f26fcf34001197ed267fa1ad549095aae49c88e Mon Sep 17 00:00:00 2001 From: Aidan MacDonald Date: Tue, 11 May 2021 13:28:43 +0100 Subject: FiiO M3K: New bootloader SPL and UCL-compressed bootloader are now packed into one output, bootloader.m3k, eliminating the separate SPL build phase. The Rockbox bootloader now has a recovery menu, accessible by holding VOL+ when booting, that lets you back up, restore, and update the bootloader from the device. Change-Id: I642c6e5fb83587a013ab2fbfd1adab439561ced2 --- firmware/target/mips/ingenic_x1000/nand-x1000.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'firmware/target/mips/ingenic_x1000/nand-x1000.c') diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.c b/firmware/target/mips/ingenic_x1000/nand-x1000.c index 1770324fb3..fbac824789 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.c +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.c @@ -200,11 +200,8 @@ static int nand_rdwr(bool write, uint32_t addr, uint32_t size, uint8_t* buf) return NAND_SUCCESS; if(write && !nand_drv.write_enabled) return NAND_ERR_WRITE_PROTECT; - /* FIXME: re-enable this check after merging new SPL+bootloader. - * It's only necessary for DMA, which is currently not used, but it's a - * good practice anyway. Disable for now due to SPL complications. */ - /*if((uint32_t)buf & (CACHEALIGN_SIZE - 1)) - return NAND_ERR_UNALIGNED;*/ + if((uint32_t)buf & (CACHEALIGN_SIZE - 1)) + return NAND_ERR_UNALIGNED; addr >>= nand_drv.chip_data->log2_page_size; size >>= nand_drv.chip_data->log2_page_size; -- cgit v1.2.3