From 3dc4f817def3f106abab05db8e8395ff77c3d087 Mon Sep 17 00:00:00 2001 From: Solomon Peachy Date: Sat, 29 Aug 2020 10:54:45 -0400 Subject: jz4760: Disable dynamic clocking entirely. Back off to 480MHz [max] clock, bus/mem clock of 120MHz. 576 is unstable on at least one unit, and 528 still glitches. Change-Id: I020e48532524e739f3bfa42bed570381ccd34959 --- firmware/target/mips/ingenic_jz47xx/system-jz4760.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'firmware/target/mips/ingenic_jz47xx') diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c index eab3ef64e6..73bd31c72c 100644 --- a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c @@ -451,7 +451,7 @@ static void pll0_init(unsigned int freq) * DIV should be one of [1, 2, 3, 4, 6, 8] */ const int div[2][6] = { { 1, 2, 2, 2, 2, 2 }, - { 1, 6, 6, 6, 6, 6 } }; + { 1, 4, 4, 4, 4, 4 } }; const int n2FR[9] = { 0, 0, 1, 2, 3, 0, 4, 0, 5 }; -- cgit v1.2.3