From 0709f0a5c60b5525ff98708887f5f1e5b0b570c2 Mon Sep 17 00:00:00 2001
From: Maurus Cuelenaere <mcuelenaere@gmail.com>
Date: Mon, 14 Jul 2008 15:03:10 +0000
Subject: Add preliminary support for the Onda VX747 (MIPS target)

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18032 a1c6a512-1295-4272-9138-f99709370657
---
 firmware/target/mips/ingenic_jz47xx/boot.lds | 107 +++++++++++++++++++++++++++
 1 file changed, 107 insertions(+)
 create mode 100755 firmware/target/mips/ingenic_jz47xx/boot.lds

(limited to 'firmware/target/mips/ingenic_jz47xx/boot.lds')

diff --git a/firmware/target/mips/ingenic_jz47xx/boot.lds b/firmware/target/mips/ingenic_jz47xx/boot.lds
new file mode 100755
index 0000000000..9bc635afad
--- /dev/null
+++ b/firmware/target/mips/ingenic_jz47xx/boot.lds
@@ -0,0 +1,107 @@
+#include "config.h"
+#undef mips
+
+OUTPUT_FORMAT("elf32-tradlittlemips")
+OUTPUT_ARCH(MIPS)
+ENTRY(_start)
+STARTUP(target/mips/ingenic_jz47xx/crt0.o)
+
+#define DRAMSIZE (MEMORYSIZE * 0x100000)
+
+#define DRAMORIG 0x80E00000 /* HACK */
+#define IRAMORIG 0x80000000
+#define IRAMSIZE 16K
+
+MEMORY
+{
+   DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
+   IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
+}
+
+SECTIONS
+{
+    . = DRAMORIG;
+
+    .text : {
+        loadaddress = .;
+        _loadaddress = .;
+        *(.init.text);
+        *(.text*);
+        *(.glue_7);
+        *(.glue_7t);
+        . = ALIGN(0x4);
+    } > DRAM
+    
+    . = ALIGN(4);
+
+    .rodata :
+    {
+        *(.rodata);  /* problems without this, dunno why */
+        *(.rodata*);
+        *(.rodata.str1.1);
+        *(.rodata.str1.4);
+        . = ALIGN(0x4);
+
+        /* Pseudo-allocate the copies of the data sections */
+        _datacopy = .;
+    } > DRAM
+    
+    . = ALIGN(4);
+
+    .data : {
+        *(.icode);
+        *(.irodata);
+        *(.idata);
+        *(.data*);
+        *(.scommon*);
+        *(.sdata*);
+        . = ALIGN(0x4);
+        _dataend = . ;
+    } > DRAM
+    
+    . = ALIGN(4);
+    
+    _gp = ALIGN(16);
+    .got : {
+        *(.got*)
+    }> DRAM
+    
+    . = ALIGN(4);
+
+    .stack :
+    {
+         *(.stack)
+         _stackbegin = .;
+         stackbegin = .;
+         . += 0x2000;
+         _stackend = .;
+         stackend = .;
+    } > DRAM
+    
+    . = ALIGN(4);
+
+    .bss :
+    {
+         _edata = .;
+         *(.sbss*);
+         *(.bss*);
+         *(.ibss);
+         *(COMMON)
+         _end = .;
+    } > DRAM
+    
+    . = ALIGN(4);
+
+    .vectors IRAMORIG :
+    {
+        _vectorsstart = .;
+        KEEP(*(.resetvectors));
+        *(.resetvectors);
+        KEEP(*(.vectors));
+        *(.vectors);
+        _vectorsend = .;
+    } AT > DRAM
+    _vectorscopy = LOADADDR(.vectors);
+    
+    . = ALIGN(4);
+}
-- 
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