From edb0c6c92f40db70be778bf9162ff116f5f01e31 Mon Sep 17 00:00:00 2001 From: Cástor Muñoz Date: Mon, 10 Nov 2014 01:50:19 +0100 Subject: iPod Classic: fix s5l8702 cache line length. Use 32 bytes for cache line length (arm926ej-s), this prevents misalignments of ATA storage buffer which in some builds could cause weird faults. Change-Id: I88dc595d251315620ec49b0251ddc039ff47181e Reviewed-on: http://gerrit.rockbox.org/1031 Reviewed-by: Marcin Bukat --- firmware/target/arm/s5l8702/debug-s5l8702.c | 5 +++++ firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) mode change 100755 => 100644 firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c (limited to 'firmware/target/arm') diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c index 27d1ccb7b8..66bfa36a93 100644 --- a/firmware/target/arm/s5l8702/debug-s5l8702.c +++ b/firmware/target/arm/s5l8702/debug-s5l8702.c @@ -61,6 +61,11 @@ bool dbg_hw_info(void) _DEBUG_PRINTF("speed: %d MHz", ((CLKCON0 & 1) ? CPUFREQ_NORMAL : CPUFREQ_MAX) / 1000000); _DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick); + uint32_t __res; + asm volatile ("mrc p15, 0, %0, c0, c0, 0" : "=r"(__res)); + _DEBUG_PRINTF("ID code: %08x", __res); + asm volatile ("mrc p15, 0, %0, c0, c0, 1" : "=r"(__res)); + _DEBUG_PRINTF("cache type: %08x", __res); line++; _DEBUG_PRINTF("LCD type: %d", lcd_type); diff --git a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c old mode 100755 new mode 100644 index 38f9758c14..58060403d5 --- a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c +++ b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c @@ -48,8 +48,8 @@ /** static, private data **/ -static uint8_t ceata_taskfile[16] __attribute__((aligned(16))); -static uint16_t ata_identify_data[0x100] __attribute__((aligned(16))); +static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR; +static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR; static bool ceata; static bool ata_swap; static bool ata_lba48; @@ -68,7 +68,7 @@ static struct semaphore mmc_wakeup; static struct semaphore mmc_comp_wakeup; static int spinup_time = 0; static int dma_mode = 0; -static char aligned_buffer[SECTOR_SIZE] __attribute__((aligned(0x10))); +static char aligned_buffer[SECTOR_SIZE] STORAGE_ALIGN_ATTR; #ifdef ATA_HAVE_BBT -- cgit v1.2.3