From b6065a8ceb83655d265c6c4adc4f30f7436e7bd7 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Fri, 26 Mar 2010 00:11:50 +0000 Subject: Use STORAGE_WANTS_ALIGN to make clear it's not a strict necessity Define PROC_NEEDS_CACHEALIGN only for PP git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25339 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/s5l8700/system-target.h | 4 +--- firmware/target/arm/system-target.h | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) (limited to 'firmware/target/arm') diff --git a/firmware/target/arm/s5l8700/system-target.h b/firmware/target/arm/s5l8700/system-target.h index c531344b64..5f91032d9e 100644 --- a/firmware/target/arm/s5l8700/system-target.h +++ b/firmware/target/arm/s5l8700/system-target.h @@ -29,10 +29,8 @@ #define CPUFREQ_NORMAL 47923200 #define CPUFREQ_MAX 191692800 -/* DMA engine needs aligned addresses */ -#define PROC_NEEDS_CACHEALIGN #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ -#define NEEDS_STORAGE_ALIGN +#define WANTS_STORAGE_ALIGN #define inl(a) (*(volatile unsigned long *) (a)) #define outl(a,b) (*(volatile unsigned long *) (b) = (a)) diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h index 1422e6467a..157a450743 100644 --- a/firmware/target/arm/system-target.h +++ b/firmware/target/arm/system-target.h @@ -164,7 +164,7 @@ static inline void wake_core(int core) #define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ #if defined(CPU_PP502x) && defined(HAVE_ATA_DMA) -#define NEEDS_STORAGE_ALIGN +#define STORAGE_WANTS_ALIGN #endif /** cache functions **/ -- cgit v1.2.3