From 9ced006c06a4240cbd2a9ebe9196d9a0658810f9 Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Sat, 19 May 2012 13:23:17 +0200 Subject: imx233: move icoll stuff to its own file The icoll code now has an IRQ storm detection mechanism which will prevent the device from hard freezing in case it happen. Change-Id: I9861238dce61d29af1e48f9c534ec63a7f23465c --- firmware/target/arm/imx233/dcp-imx233.c | 2 +- firmware/target/arm/imx233/i2c-imx233.c | 2 +- firmware/target/arm/imx233/icoll-imx233.c | 177 ++++++++++++++++++++++++++++ firmware/target/arm/imx233/icoll-imx233.h | 81 +++++++++++++ firmware/target/arm/imx233/pcm-imx233.c | 4 +- firmware/target/arm/imx233/pinctrl-imx233.c | 2 +- firmware/target/arm/imx233/power-imx233.c | 2 +- firmware/target/arm/imx233/ssp-imx233.c | 2 +- firmware/target/arm/imx233/system-imx233.c | 122 +------------------ firmware/target/arm/imx233/system-target.h | 45 +------ firmware/target/arm/imx233/timrot-imx233.c | 4 +- firmware/target/arm/imx233/usb-imx233.c | 2 +- 12 files changed, 271 insertions(+), 174 deletions(-) create mode 100644 firmware/target/arm/imx233/icoll-imx233.c create mode 100644 firmware/target/arm/imx233/icoll-imx233.h (limited to 'firmware/target/arm') diff --git a/firmware/target/arm/imx233/dcp-imx233.c b/firmware/target/arm/imx233/dcp-imx233.c index f7849b183f..358441ef84 100644 --- a/firmware/target/arm/imx233/dcp-imx233.c +++ b/firmware/target/arm/imx233/dcp-imx233.c @@ -116,7 +116,7 @@ static enum imx233_dcp_error_t imx233_dcp_job(int ch) /* if IRQs are not enabled, don't enable channel interrupt and do some polling */ bool irq_enabled = irq_enabled(); /* enable channel, clear interrupt, enable interrupt */ - imx233_enable_interrupt(INT_SRC_DCP, true); + imx233_icoll_enable_interrupt(INT_SRC_DCP, true); if(irq_enabled) __REG_SET(HW_DCP_CTRL) = HW_DCP_CTRL__CHANNEL_INTERRUPT_ENABLE(ch); __REG_CLR(HW_DCP_STAT) = HW_DCP_STAT__IRQ(ch); diff --git a/firmware/target/arm/imx233/i2c-imx233.c b/firmware/target/arm/imx233/i2c-imx233.c index 199ad181ba..c58494154f 100644 --- a/firmware/target/arm/imx233/i2c-imx233.c +++ b/firmware/target/arm/imx233/i2c-imx233.c @@ -124,7 +124,7 @@ enum imx233_i2c_error_t imx233_i2c_end(unsigned timeout) i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__SEMAPHORE | HW_APB_CHx_CMD__IRQONCMPLT; __REG_CLR(HW_I2C_CTRL1) = HW_I2C_CTRL1__ALL_IRQ; - imx233_enable_interrupt(INT_SRC_I2C_DMA, true); + imx233_icoll_enable_interrupt(INT_SRC_I2C_DMA, true); imx233_dma_enable_channel_interrupt(APB_I2C, true); imx233_dma_reset_channel(APB_I2C); imx233_dma_start_command(APB_I2C, &i2c_stage[0].dma); diff --git a/firmware/target/arm/imx233/icoll-imx233.c b/firmware/target/arm/imx233/icoll-imx233.c new file mode 100644 index 0000000000..4e0d525da3 --- /dev/null +++ b/firmware/target/arm/imx233/icoll-imx233.c @@ -0,0 +1,177 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2012 by amaury Pouly + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "icoll-imx233.h" +#include "rtc-imx233.h" +#include "string.h" + +#define default_interrupt(name) \ + extern __attribute__((weak, alias("UIRQ"))) void name(void) + +static void UIRQ (void) __attribute__((interrupt ("IRQ"))); +void irq_handler(void) __attribute__((interrupt("IRQ"))); +void fiq_handler(void) __attribute__((interrupt("FIQ"))); + +default_interrupt(INT_USB_CTRL); +default_interrupt(INT_TIMER0); +default_interrupt(INT_TIMER1); +default_interrupt(INT_TIMER2); +default_interrupt(INT_TIMER3); +default_interrupt(INT_LCDIF_DMA); +default_interrupt(INT_LCDIF_ERROR); +default_interrupt(INT_SSP1_DMA); +default_interrupt(INT_SSP1_ERROR); +default_interrupt(INT_SSP2_DMA); +default_interrupt(INT_SSP2_ERROR); +default_interrupt(INT_I2C_DMA); +default_interrupt(INT_I2C_ERROR); +default_interrupt(INT_GPIO0); +default_interrupt(INT_GPIO1); +default_interrupt(INT_GPIO2); +default_interrupt(INT_VDD5V); +default_interrupt(INT_LRADC_CH0); +default_interrupt(INT_LRADC_CH1); +default_interrupt(INT_LRADC_CH2); +default_interrupt(INT_LRADC_CH3); +default_interrupt(INT_LRADC_CH4); +default_interrupt(INT_LRADC_CH5); +default_interrupt(INT_LRADC_CH6); +default_interrupt(INT_LRADC_CH7); +default_interrupt(INT_DAC_DMA); +default_interrupt(INT_DAC_ERROR); +default_interrupt(INT_ADC_DMA); +default_interrupt(INT_ADC_ERROR); +default_interrupt(INT_DCP); +default_interrupt(INT_TOUCH_DETECT); + +void INT_RTC_1MSEC(void); + +typedef void (*isr_t)(void); + +static isr_t isr_table[INT_SRC_NR_SOURCES] = +{ + [INT_SRC_USB_CTRL] = INT_USB_CTRL, + [INT_SRC_TIMER(0)] = INT_TIMER0, + [INT_SRC_TIMER(1)] = INT_TIMER1, + [INT_SRC_TIMER(2)] = INT_TIMER2, + [INT_SRC_TIMER(3)] = INT_TIMER3, + [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, + [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, + [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, + [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, + [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, + [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, + [INT_SRC_I2C_DMA] = INT_I2C_DMA, + [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, + [INT_SRC_GPIO0] = INT_GPIO0, + [INT_SRC_GPIO1] = INT_GPIO1, + [INT_SRC_GPIO2] = INT_GPIO2, + [INT_SRC_VDD5V] = INT_VDD5V, + [INT_SRC_LRADC_CHx(0)] = INT_LRADC_CH0, + [INT_SRC_LRADC_CHx(1)] = INT_LRADC_CH1, + [INT_SRC_LRADC_CHx(2)] = INT_LRADC_CH2, + [INT_SRC_LRADC_CHx(3)] = INT_LRADC_CH3, + [INT_SRC_LRADC_CHx(4)] = INT_LRADC_CH4, + [INT_SRC_LRADC_CHx(5)] = INT_LRADC_CH5, + [INT_SRC_LRADC_CHx(6)] = INT_LRADC_CH6, + [INT_SRC_LRADC_CHx(7)] = INT_LRADC_CH7, + [INT_SRC_DAC_DMA] = INT_DAC_DMA, + [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, + [INT_SRC_ADC_DMA] = INT_ADC_DMA, + [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, + [INT_SRC_DCP] = INT_DCP, + [INT_SRC_TOUCH_DETECT] = INT_TOUCH_DETECT, + [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC, +}; + +#define IRQ_STORM_DELAY 1000 /* ms */ +#define IRQ_STORM_THRESHOLD 100000 /* allows irq / delay */ + +static uint32_t irq_count_old[INT_SRC_NR_SOURCES]; +static uint32_t irq_count[INT_SRC_NR_SOURCES]; + +struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src) +{ + struct imx233_icoll_irq_info_t info; + info.enabled = !!(HW_ICOLL_INTERRUPT(src) & HW_ICOLL_INTERRUPT__ENABLE); + info.freq = irq_count_old[src]; + return info; +} + +void INT_RTC_1MSEC(void) +{ + static unsigned counter = 0; + if(counter++ >= IRQ_STORM_DELAY) + { + counter = 0; + memcpy(irq_count_old, irq_count, sizeof(irq_count)); + memset(irq_count, 0, sizeof(irq_count)); + } + imx233_rtc_clear_msec_irq(); +} + +static void UIRQ(void) +{ + panicf("Unhandled IRQ %02X", + (unsigned int)(HW_ICOLL_VECTOR - (uint32_t)isr_table) / 4); +} + +void irq_handler(void) +{ + HW_ICOLL_VECTOR = HW_ICOLL_VECTOR; /* notify icoll that we entered ISR */ + int irq_nr = (HW_ICOLL_VECTOR - HW_ICOLL_VBASE) / 4; + if(irq_count[irq_nr]++ > IRQ_STORM_THRESHOLD) + panicf("IRQ %d: storm detected", irq_nr); + (*(isr_t *)HW_ICOLL_VECTOR)(); + /* acknowledge completion of IRQ (all use the same priority 0) */ + HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0; +} + +void fiq_handler(void) +{ +} + +void imx233_icoll_enable_interrupt(int src, bool enable) +{ + if(enable) + __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; + else + __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; +} + +void imx233_icoll_init(void) +{ + imx233_reset_block(&HW_ICOLL_CTRL); + /* disable all interrupts */ + for(int i = 0; i < INT_SRC_NR_SOURCES; i++) + { + /* priority = 0, disable, disable fiq */ + HW_ICOLL_INTERRUPT(i) = 0; + } + /* setup vbase as isr_table */ + HW_ICOLL_VBASE = (uint32_t)&isr_table; + /* enable final irq bit */ + __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE; + + imx233_rtc_enable_msec_irq(true); + imx233_icoll_enable_interrupt(INT_SRC_RTC_1MSEC, true); +} + diff --git a/firmware/target/arm/imx233/icoll-imx233.h b/firmware/target/arm/imx233/icoll-imx233.h new file mode 100644 index 0000000000..d1bf8a18aa --- /dev/null +++ b/firmware/target/arm/imx233/icoll-imx233.h @@ -0,0 +1,81 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2012 by Amaury Pouly + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef ICOLL_IMX233_H +#define ICOLL_IMX233_H + +#include "config.h" +#include "system.h" + +/* Interrupt collector */ +#define HW_ICOLL_BASE 0x80000000 + +#define HW_ICOLL_VECTOR (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x0)) + +#define HW_ICOLL_LEVELACK (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x10)) +#define HW_ICOLL_LEVELACK__LEVEL0 0x1 + +#define HW_ICOLL_CTRL (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x20)) +#define HW_ICOLL_CTRL__IRQ_FINAL_ENABLE (1 << 16) +#define HW_ICOLL_CTRL__ARM_RSE_MODE (1 << 18) + +#define HW_ICOLL_VBASE (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x40)) +#define HW_ICOLL_INTERRUPT(i) (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x120 + (i) * 0x10)) +#define HW_ICOLL_INTERRUPT__PRIORITY_BM 0x3 +#define HW_ICOLL_INTERRUPT__ENABLE 0x4 +#define HW_ICOLL_INTERRUPT__SOFTIRQ 0x8 +#define HW_ICOLL_INTERRUPT__ENFIQ 0x10 + +#define INT_SRC_SSP2_ERROR 2 +#define INT_SRC_VDD5V 3 +#define INT_SRC_DAC_DMA 5 +#define INT_SRC_DAC_ERROR 6 +#define INT_SRC_ADC_DMA 7 +#define INT_SRC_ADC_ERROR 8 +#define INT_SRC_USB_CTRL 11 +#define INT_SRC_SSP1_DMA 14 +#define INT_SRC_SSP1_ERROR 15 +#define INT_SRC_GPIO0 16 +#define INT_SRC_GPIO1 17 +#define INT_SRC_GPIO2 18 +#define INT_SRC_GPIO(i) (INT_SRC_GPIO0 + (i)) +#define INT_SRC_SSP2_DMA 20 +#define INT_SRC_I2C_DMA 26 +#define INT_SRC_I2C_ERROR 27 +#define INT_SRC_TIMER(nr) (28 + (nr)) +#define INT_SRC_TOUCH_DETECT 36 +#define INT_SRC_LRADC_CHx(x) (37 + (x)) +#define INT_SRC_LCDIF_DMA 45 +#define INT_SRC_LCDIF_ERROR 46 +#define INT_SRC_RTC_1MSEC 48 +#define INT_SRC_DCP 54 +#define INT_SRC_NR_SOURCES 66 + +struct imx233_icoll_irq_info_t +{ + bool enabled; + unsigned freq; +}; + +void imx233_icoll_init(void); +void imx233_icoll_enable_interrupt(int src, bool enable); +struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src); + +#endif /* ICOLL_IMX233_H */ diff --git a/firmware/target/arm/imx233/pcm-imx233.c b/firmware/target/arm/imx233/pcm-imx233.c index c4c512eed6..e94260e457 100644 --- a/firmware/target/arm/imx233/pcm-imx233.c +++ b/firmware/target/arm/imx233/pcm-imx233.c @@ -103,8 +103,8 @@ void pcm_play_dma_init(void) void pcm_play_dma_postinit(void) { audiohw_postinit(); - imx233_enable_interrupt(INT_SRC_DAC_DMA, true); - imx233_enable_interrupt(INT_SRC_DAC_ERROR, true); + imx233_icoll_enable_interrupt(INT_SRC_DAC_DMA, true); + imx233_icoll_enable_interrupt(INT_SRC_DAC_ERROR, true); imx233_dma_enable_channel_interrupt(APB_AUDIO_DAC, true); } diff --git a/firmware/target/arm/imx233/pinctrl-imx233.c b/firmware/target/arm/imx233/pinctrl-imx233.c index be2d8b2262..d667e8d25c 100644 --- a/firmware/target/arm/imx233/pinctrl-imx233.c +++ b/firmware/target/arm/imx233/pinctrl-imx233.c @@ -111,6 +111,6 @@ void imx233_setup_pin_irq(int bank, int pin, bool enable_int, __REG_CLR(HW_PINCTRL_IRQPOL(bank)) = 1 << pin; __REG_SET(HW_PINCTRL_PIN2IRQ(bank)) = 1 << pin; __REG_SET(HW_PINCTRL_IRQEN(bank)) = 1 << pin; - imx233_enable_interrupt(INT_SRC_GPIO(bank), true); + imx233_icoll_enable_interrupt(INT_SRC_GPIO(bank), true); } } diff --git a/firmware/target/arm/imx233/power-imx233.c b/firmware/target/arm/imx233/power-imx233.c index be12207793..6ba08ae394 100644 --- a/firmware/target/arm/imx233/power-imx233.c +++ b/firmware/target/arm/imx233/power-imx233.c @@ -96,7 +96,7 @@ void power_init(void) else __REG_SET(HW_POWER_CTRL) = HW_POWER_CTRL__POLARITY_VBUSVALID; __REG_SET(HW_POWER_CTRL) = HW_POWER_CTRL__ENIRQ_VBUS_VALID; - imx233_enable_interrupt(INT_SRC_VDD5V, true); + imx233_icoll_enable_interrupt(INT_SRC_VDD5V, true); /* setup linear regulator offsets to 25 mV below to prevent contention between * linear regulators and DCDC */ __FIELD_SET(HW_POWER_VDDDCTRL, LINREG_OFFSET, 2); diff --git a/firmware/target/arm/imx233/ssp-imx233.c b/firmware/target/arm/imx233/ssp-imx233.c index bdbde9ec93..1dd2d767ba 100644 --- a/firmware/target/arm/imx233/ssp-imx233.c +++ b/firmware/target/arm/imx233/ssp-imx233.c @@ -245,7 +245,7 @@ enum imx233_ssp_error_t imx233_ssp_sd_mmc_transfer(int ssp, uint8_t cmd, { mutex_lock(&ssp_mutex[ssp - 1]); /* Enable all interrupts */ - imx233_enable_interrupt(INT_SRC_SSP_DMA(ssp), true); + imx233_icoll_enable_interrupt(INT_SRC_SSP_DMA(ssp), true); imx233_dma_enable_channel_interrupt(APB_SSP(ssp), true); unsigned xfer_size = block_count * (1 << ssp_log_block_size[ssp - 1]); diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c index 51eb099709..a06ecab9f5 100644 --- a/firmware/target/arm/imx233/system-imx233.c +++ b/firmware/target/arm/imx233/system-imx233.c @@ -31,6 +31,7 @@ #include "ssp-imx233.h" #include "i2c-imx233.h" #include "dcp-imx233.h" +#include "icoll-imx233.h" #include "lradc-imx233.h" #include "rtc-imx233.h" #include "lcd.h" @@ -38,98 +39,6 @@ #include "button.h" #include "fmradio_i2c.h" -#define default_interrupt(name) \ - extern __attribute__((weak, alias("UIRQ"))) void name(void) - -static void UIRQ (void) __attribute__((interrupt ("IRQ"))); -void irq_handler(void) __attribute__((interrupt("IRQ"))); -void fiq_handler(void) __attribute__((interrupt("FIQ"))); - -default_interrupt(INT_USB_CTRL); -default_interrupt(INT_TIMER0); -default_interrupt(INT_TIMER1); -default_interrupt(INT_TIMER2); -default_interrupt(INT_TIMER3); -default_interrupt(INT_LCDIF_DMA); -default_interrupt(INT_LCDIF_ERROR); -default_interrupt(INT_SSP1_DMA); -default_interrupt(INT_SSP1_ERROR); -default_interrupt(INT_SSP2_DMA); -default_interrupt(INT_SSP2_ERROR); -default_interrupt(INT_I2C_DMA); -default_interrupt(INT_I2C_ERROR); -default_interrupt(INT_GPIO0); -default_interrupt(INT_GPIO1); -default_interrupt(INT_GPIO2); -default_interrupt(INT_VDD5V); -default_interrupt(INT_LRADC_CH0); -default_interrupt(INT_LRADC_CH1); -default_interrupt(INT_LRADC_CH2); -default_interrupt(INT_LRADC_CH3); -default_interrupt(INT_LRADC_CH4); -default_interrupt(INT_LRADC_CH5); -default_interrupt(INT_LRADC_CH6); -default_interrupt(INT_LRADC_CH7); -default_interrupt(INT_DAC_DMA); -default_interrupt(INT_DAC_ERROR); -default_interrupt(INT_ADC_DMA); -default_interrupt(INT_ADC_ERROR); -default_interrupt(INT_DCP); - -typedef void (*isr_t)(void); - -static isr_t isr_table[INT_SRC_NR_SOURCES] = -{ - [INT_SRC_USB_CTRL] = INT_USB_CTRL, - [INT_SRC_TIMER(0)] = INT_TIMER0, - [INT_SRC_TIMER(1)] = INT_TIMER1, - [INT_SRC_TIMER(2)] = INT_TIMER2, - [INT_SRC_TIMER(3)] = INT_TIMER3, - [INT_SRC_LCDIF_DMA] = INT_LCDIF_DMA, - [INT_SRC_LCDIF_ERROR] = INT_LCDIF_ERROR, - [INT_SRC_SSP1_DMA] = INT_SSP1_DMA, - [INT_SRC_SSP1_ERROR] = INT_SSP1_ERROR, - [INT_SRC_SSP2_DMA] = INT_SSP2_DMA, - [INT_SRC_SSP2_ERROR] = INT_SSP2_ERROR, - [INT_SRC_I2C_DMA] = INT_I2C_DMA, - [INT_SRC_I2C_ERROR] = INT_I2C_ERROR, - [INT_SRC_GPIO0] = INT_GPIO0, - [INT_SRC_GPIO1] = INT_GPIO1, - [INT_SRC_GPIO2] = INT_GPIO2, - [INT_SRC_VDD5V] = INT_VDD5V, - [INT_SRC_LRADC_CHx(0)] = INT_LRADC_CH0, - [INT_SRC_LRADC_CHx(1)] = INT_LRADC_CH1, - [INT_SRC_LRADC_CHx(2)] = INT_LRADC_CH2, - [INT_SRC_LRADC_CHx(3)] = INT_LRADC_CH3, - [INT_SRC_LRADC_CHx(4)] = INT_LRADC_CH4, - [INT_SRC_LRADC_CHx(5)] = INT_LRADC_CH5, - [INT_SRC_LRADC_CHx(6)] = INT_LRADC_CH6, - [INT_SRC_LRADC_CHx(7)] = INT_LRADC_CH7, - [INT_SRC_DAC_DMA] = INT_DAC_DMA, - [INT_SRC_DAC_ERROR] = INT_DAC_ERROR, - [INT_SRC_ADC_DMA] = INT_ADC_DMA, - [INT_SRC_ADC_ERROR] = INT_ADC_ERROR, - [INT_SRC_DCP] = INT_DCP, -}; - -static void UIRQ(void) -{ - panicf("Unhandled IRQ %02X", - (unsigned int)(HW_ICOLL_VECTOR - (uint32_t)isr_table) / 4); -} - -void irq_handler(void) -{ - HW_ICOLL_VECTOR = HW_ICOLL_VECTOR; /* notify icoll that we entered ISR */ - (*(isr_t *)HW_ICOLL_VECTOR)(); - /* acknowledge completion of IRQ (all use the same priority 0) */ - HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0; -} - -void fiq_handler(void) -{ -} - void imx233_chip_reset(void) { HW_CLKCTRL_RESET = HW_CLKCTRL_RESET_CHIP; @@ -164,22 +73,6 @@ int system_memory_guard(int newmode) return 0; } -void imx233_enable_interrupt(int src, bool enable) -{ - if(enable) - __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; - else - __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__ENABLE; -} - -void imx233_softirq(int src, bool enable) -{ - if(enable) - __REG_SET(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ; - else - __REG_CLR(HW_ICOLL_INTERRUPT(src)) = HW_ICOLL_INTERRUPT__SOFTIRQ; -} - static void set_page_tables(void) { /* map every memory region to itself */ @@ -199,19 +92,8 @@ void memory_init(void) void system_init(void) { - imx233_reset_block(&HW_ICOLL_CTRL); - /* disable all interrupts */ - for(int i = 0; i < INT_SRC_NR_SOURCES; i++) - { - /* priority = 0, disable, disable fiq */ - HW_ICOLL_INTERRUPT(i) = 0; - } - /* setup vbase as isr_table */ - HW_ICOLL_VBASE = (uint32_t)&isr_table; - /* enable final irq bit */ - __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE; - imx233_rtc_init(); + imx233_icoll_init(); imx233_pinctrl_init(); imx233_timrot_init(); imx233_dma_init(); diff --git a/firmware/target/arm/imx233/system-target.h b/firmware/target/arm/imx233/system-target.h index d9a19efa8f..2e850e830d 100644 --- a/firmware/target/arm/imx233/system-target.h +++ b/firmware/target/arm/imx233/system-target.h @@ -25,6 +25,7 @@ #include "mmu-arm.h" #include "panic.h" #include "clkctrl-imx233.h" +#include "icoll-imx233.h" #include "clock-target.h" /* CPUFREQ_* are defined here */ /* Digital control */ @@ -43,48 +44,6 @@ #define HW_USBPHY_CTRL (*(volatile uint32_t *)(HW_USBPHY_BASE + 0x30)) -/* Interrupt collector */ -#define HW_ICOLL_BASE 0x80000000 - -#define HW_ICOLL_VECTOR (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x0)) - -#define HW_ICOLL_LEVELACK (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x10)) -#define HW_ICOLL_LEVELACK__LEVEL0 0x1 - -#define HW_ICOLL_CTRL (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x20)) -#define HW_ICOLL_CTRL__IRQ_FINAL_ENABLE (1 << 16) -#define HW_ICOLL_CTRL__ARM_RSE_MODE (1 << 18) - -#define HW_ICOLL_VBASE (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x40)) -#define HW_ICOLL_INTERRUPT(i) (*(volatile uint32_t *)(HW_ICOLL_BASE + 0x120 + (i) * 0x10)) -#define HW_ICOLL_INTERRUPT__PRIORITY_BM 0x3 -#define HW_ICOLL_INTERRUPT__ENABLE 0x4 -#define HW_ICOLL_INTERRUPT__SOFTIRQ 0x8 -#define HW_ICOLL_INTERRUPT__ENFIQ 0x10 - -#define INT_SRC_SSP2_ERROR 2 -#define INT_SRC_VDD5V 3 -#define INT_SRC_DAC_DMA 5 -#define INT_SRC_DAC_ERROR 6 -#define INT_SRC_ADC_DMA 7 -#define INT_SRC_ADC_ERROR 8 -#define INT_SRC_USB_CTRL 11 -#define INT_SRC_SSP1_DMA 14 -#define INT_SRC_SSP1_ERROR 15 -#define INT_SRC_GPIO0 16 -#define INT_SRC_GPIO1 17 -#define INT_SRC_GPIO2 18 -#define INT_SRC_GPIO(i) (INT_SRC_GPIO0 + (i)) -#define INT_SRC_SSP2_DMA 20 -#define INT_SRC_I2C_DMA 26 -#define INT_SRC_I2C_ERROR 27 -#define INT_SRC_TIMER(nr) (28 + (nr)) -#define INT_SRC_LRADC_CHx(x) (37 + (x)) -#define INT_SRC_LCDIF_DMA 45 -#define INT_SRC_LCDIF_ERROR 46 -#define INT_SRC_DCP 54 -#define INT_SRC_NR_SOURCES 66 - /** * Absolute maximum CPU speed: 454.74 MHz * Intermediate CPU speeds: 392.73 MHz, 360MHz, 261.82 MHz, 64 MHz @@ -101,8 +60,6 @@ #define CPUFREQ_MAX IMX233_CPUFREQ_454_MHz #define CPUFREQ_SLEEP IMX233_CPUFREQ_454_MHz -void imx233_enable_interrupt(int src, bool enable); -void imx233_softirq(int src, bool enable); void udelay(unsigned us); bool imx233_us_elapsed(uint32_t ref, unsigned us_delay); void imx233_reset_block(volatile uint32_t *block_reg); diff --git a/firmware/target/arm/imx233/timrot-imx233.c b/firmware/target/arm/imx233/timrot-imx233.c index 24ed0096ab..327b1d16b1 100644 --- a/firmware/target/arm/imx233/timrot-imx233.c +++ b/firmware/target/arm/imx233/timrot-imx233.c @@ -58,13 +58,13 @@ void imx233_setup_timer(unsigned timer_nr, bool reload, unsigned count, if(fn != NULL) { /* enable interrupt */ - imx233_enable_interrupt(INT_SRC_TIMER(timer_nr), true); + imx233_icoll_enable_interrupt(INT_SRC_TIMER(timer_nr), true); /* clear irq bit and enable */ __REG_CLR(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__IRQ; __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__IRQ_EN; } else - imx233_enable_interrupt(INT_SRC_TIMER(timer_nr), false); + imx233_icoll_enable_interrupt(INT_SRC_TIMER(timer_nr), false); /* finally update */ __REG_SET(HW_TIMROT_TIMCTRL(timer_nr)) = HW_TIMROT_TIMCTRL__UPDATE; diff --git a/firmware/target/arm/imx233/usb-imx233.c b/firmware/target/arm/imx233/usb-imx233.c index 304018b09b..409dcd340d 100644 --- a/firmware/target/arm/imx233/usb-imx233.c +++ b/firmware/target/arm/imx233/usb-imx233.c @@ -47,7 +47,7 @@ void usb_attach(void) void usb_drv_int_enable(bool enable) { - imx233_enable_interrupt(INT_SRC_USB_CTRL, enable); + imx233_icoll_enable_interrupt(INT_SRC_USB_CTRL, enable); } void INT_USB_CTRL(void) -- cgit v1.2.3