From fe23dc8f15e9d01ea634d10b334984f1d8760007 Mon Sep 17 00:00:00 2001 From: Jens Arnold Date: Mon, 2 Jul 2007 05:16:40 +0000 Subject: Improved CPU clock setup for PP502x. PP5020 and PP5022 are not register compatible here, so define the PP5022 targets properly, and introduce a CPU_PP502x macro for easier family check. Improves stability on PP5020 (less freezing, tested with Mini G1) and reduces clock change penalty (500us on PP5020; uses the relock bit on PP5022). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13763 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/wmcodec-pp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'firmware/target/arm/wmcodec-pp.c') diff --git a/firmware/target/arm/wmcodec-pp.c b/firmware/target/arm/wmcodec-pp.c index 505a31deb4..7d00369bf0 100644 --- a/firmware/target/arm/wmcodec-pp.c +++ b/firmware/target/arm/wmcodec-pp.c @@ -43,7 +43,7 @@ int audiohw_init(void) { /* reset I2C */ i2c_init(); -#if CONFIG_CPU == PP5020 +#ifdef CPU_PP502x /* normal outputs for CDI and I2S pin groups */ DEV_INIT &= ~0x300; -- cgit v1.2.3