From d8c7285b2aef85c9998c6558429a9f4e27066748 Mon Sep 17 00:00:00 2001
From: Karl Kurbjun <kkurbjun@gmail.com>
Date: Fri, 15 May 2009 13:43:30 +0000
Subject: M:Robe 500: Commit some minor changes and some keymap changes (short
 press power takes you out of the WPS)

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20942 a1c6a512-1295-4272-9138-f99709370657
---
 .../target/arm/tms320dm320/mrobe-500/ata-mr500.c   | 64 ----------------------
 1 file changed, 64 deletions(-)

(limited to 'firmware/target/arm/tms320dm320/mrobe-500/ata-mr500.c')

diff --git a/firmware/target/arm/tms320dm320/mrobe-500/ata-mr500.c b/firmware/target/arm/tms320dm320/mrobe-500/ata-mr500.c
index 2377309a1d..51837dd653 100644
--- a/firmware/target/arm/tms320dm320/mrobe-500/ata-mr500.c
+++ b/firmware/target/arm/tms320dm320/mrobe-500/ata-mr500.c
@@ -68,67 +68,3 @@ void ata_device_init(void)
     IO_GIO_DIR0&=~(1<<10);
 }
 
-#if 0
-void copy_read_sectors(unsigned char* buf, int wordcount)
-{
-    __buttonlight_trigger();
-
-    /* Unaligned transfer - slow copy */
-    if ( (unsigned long)buf & 1)
-    {   /* not 16-bit aligned, copy byte by byte */
-        unsigned short tmp = 0;
-        unsigned char* bufend = buf + wordcount*2;
-        do
-        {
-            tmp = ATA_DATA;
-            *buf++ = tmp & 0xff; /* I assume big endian */
-            *buf++ = tmp >> 8;   /*  and don't use the SWAB16 macro */
-        } while (buf < bufend); /* tail loop is faster */
-        return;
-    }
-    /* This should never happen, but worth watching for */
-    if(wordcount > (1 << 18))
-        panicf("atd-meg-fx.c: copy_read_sectors: too many sectors per read!");
-
-//#define GIGABEAT_DEBUG_ATA
-#ifdef GIGABEAT_DEBUG_ATA
-        static int line = 0;
-        static char str[256];
-        snprintf(str, sizeof(str), "ODD DMA to %08x, %d", buf, wordcount);
-        lcd_puts(10, line, str);
-        line = (line+1) % 32;
-        lcd_update();
-#endif
-    /* Reset the channel */
-    DMASKTRIG0 |= 4;
-    /* Wait for DMA controller to be ready */
-    while(DMASKTRIG0 & 0x2)
-        ;
-    while(DSTAT0 & (1 << 20))
-        ;
-    /* Source is ATA_DATA, on AHB Bus, Fixed */
-    DISRC0 = (int) 0x18000000;
-    DISRCC0 = 0x1;
-    /* Dest mapped to physical address, on AHB bus, increment */
-    DIDST0 = (int) buf;
-	if(DIDST0 < 0x30000000)
-		DIDST0 += 0x30000000;
-    DIDSTC0 = 0;
-
-    /* DACK/DREQ Sync to AHB, Whole service, No reload, 16-bit transfers */
-    DCON0 = ((1 << 30) | (1<<27) | (1<<22) | (1<<20)) | wordcount;
-
-    /* Activate the channel */
-    DMASKTRIG0 = 0x2;
-
-    invalidate_dcache_range((void *)buf, wordcount*2);
-
-    /* Start DMA */
-    DMASKTRIG0 |= 0x1;
-
-    /* Wait for transfer to complete */
-    while((DSTAT0 & 0x000fffff))
-        priority_yield();
-    /* Dump cache for the buffer  */
-}
-#endif
-- 
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