From 4fa96fbc914ae8fd69aedafd73f4f1798679d29f Mon Sep 17 00:00:00 2001 From: Karl Kurbjun Date: Wed, 1 Apr 2009 03:21:18 +0000 Subject: M:Robe 500i: More LCD initialization, and beginnings of support for QVGA as well as VGA on the LCD. MPEGPlayer now works with reasonable performance on smaller videos, but YUV blitting persists after MPEGPlayer is left, some cleanup/changes to the initialization code. This should be functionally equivalent for the ZVM, but the #ifdef's may need to be added back for app.lds. Get the bootloader building again. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20598 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/tms320dm320/crt0.S | 105 ++++++++------------------------- 1 file changed, 24 insertions(+), 81 deletions(-) (limited to 'firmware/target/arm/tms320dm320/crt0.S') diff --git a/firmware/target/arm/tms320dm320/crt0.S b/firmware/target/arm/tms320dm320/crt0.S index 9375de7d0d..a5a965b9c2 100755 --- a/firmware/target/arm/tms320dm320/crt0.S +++ b/firmware/target/arm/tms320dm320/crt0.S @@ -30,20 +30,6 @@ .global start start: - .equ INTC_IRQ0, 0x00030508 - .equ INTC_IRQ1, 0x0003050A - .equ INTC_IRQ2, 0x0003050C - .equ INTC_FIQ0, 0x00030500 - .equ INTC_FIQ1, 0x00030502 - .equ INTC_FIQ2, 0x00030504 - .equ INTC_EINT0, 0x00030528 - .equ INTC_EINT1, 0x0003052A - .equ INTC_EINT2, 0x0003052C - .equ INTC_FISEL0, 0x00030520 - .equ INTC_FISEL1, 0x00030522 - .equ INTC_FISEL2, 0x00030524 - .equ INTC_MASK, 0xFFFFFFFF - msr cpsr, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ #ifndef CREATIVE_ZVx @@ -68,37 +54,6 @@ start: orr r0, r0, #0x00000002 mcr p15, 0, r0, c1, c0, 0 -#if 0 - /* mask interrupts */ - ldr r1, =INTC_MASK - ldr r2, =INTC_IRQ0 - strh r1, [r2] - ldr r2, =INTC_IRQ1 - strh r1, [r2] - ldr r2, =INTC_IRQ2 - strh r1, [r2] - ldr r2, =INTC_FIQ0 - strh r1, [r2] - ldr r2, =INTC_FIQ1 - strh r1, [r2] - ldr r2, =INTC_FIQ2 - strh r1, [r2] - - mov r1, #0 - ldr r2, =INTC_EINT0 - strh r1, [r2] - ldr r2, =INTC_EINT1 - strh r1, [r2] - ldr r2, =INTC_EINT2 - strh r1, [r2] - ldr r2, =INTC_FISEL0 - strh r1, [r2] - ldr r2, =INTC_FISEL1 - strh r1, [r2] - ldr r2, =INTC_FISEL2 - strh r1, [r2] -#endif - #if !defined(BOOTLOADER) && !defined(STUB) /* Zero out IBSS */ ldr r2, =_iedata @@ -122,25 +77,25 @@ start: #endif #endif /* !BOOTLOADER,!STUB */ - /* Initialise bss section to zero */ - ldr r2, =_edata - ldr r3, =_end - mov r4, #0 -1: - cmp r3, r2 - strhi r4, [r2], #4 - bhi 1b - /* Load stack munge value */ - ldr r4, =0xdeadbeef + /* Initialise bss section to zero */ + ldr r2, =_edata + ldr r3, =_end + mov r4, #0 +bsszero: + cmp r3, r2 + strhi r4, [r2], #4 + bhi bsszero /* Set up some stack and munge it with 0xdeadbeef */ - ldr r2, =stackbegin - ldr r3, =stackend -1: - cmp r3, r2 - strhi r4, [r2], #4 - bhi 1b + ldr sp, =stackend + mov r3, sp + ldr r2, =stackbegin + ldr r4, =0xdeadbeef +stackmunge: + cmp r3, r2 + strhi r4, [r2], #4 + bhi stackmunge /* Set up stack for IRQ mode */ msr cpsr_c, #0xd2 /* IRQ disabled, FIQ enabled */ @@ -185,26 +140,14 @@ start_loc: /* Exception handlers. Will be copied to address 0 after memory remapping */ .section .vectors,"aw" - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - - /* Exception vectors */ - .global vectors -vectors: - .word start - .word undef_instr_handler - .word software_int_handler - .word prefetch_abort_handler - .word data_abort_handler - .word reserved_handler - .word irq_handler - .word fiq_handler + b start + b undef_instr_handler + b software_int_handler + b prefetch_abort_handler + b data_abort_handler + b reserved_handler + b irq_handler + b fiq_handler .text -- cgit v1.2.3