From d8ef7c58d83591bb0660fc4965cf2319fb5a4718 Mon Sep 17 00:00:00 2001
From: Daniel Ankers <dan@weirdo.org.uk>
Date: Mon, 16 Oct 2006 17:21:36 +0000
Subject: Big Sansa update:  Go back to using the common crt0-pp.S.  Add LCD
 driver.  Add ADC driver (may not be needed).  Fix a bug in the button driver.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11237 a1c6a512-1295-4272-9138-f99709370657
---
 firmware/target/arm/sandisk/sansa-e200/adc-e200.c | 92 +++++++++++++++++++++++
 1 file changed, 92 insertions(+)
 create mode 100644 firmware/target/arm/sandisk/sansa-e200/adc-e200.c

(limited to 'firmware/target/arm/sandisk/sansa-e200/adc-e200.c')

diff --git a/firmware/target/arm/sandisk/sansa-e200/adc-e200.c b/firmware/target/arm/sandisk/sansa-e200/adc-e200.c
new file mode 100644
index 0000000000..fbfa7d698a
--- /dev/null
+++ b/firmware/target/arm/sandisk/sansa-e200/adc-e200.c
@@ -0,0 +1,92 @@
+/***************************************************************************
+ *             __________               __   ___.
+ *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
+ *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
+ *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
+ *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
+ *                     \/            \/     \/    \/            \/
+ * $Id$
+ *
+ * Copyright (C) 2006 by Barry Wardell
+ *
+ * All files in this archive are subject to the GNU General Public License.
+ * See the file COPYING in the source tree root for full license agreement.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+#include "cpu.h"
+#include "system.h"
+#include "kernel.h"
+#include "thread.h"
+#include "adc.h"
+
+static unsigned short adcdata[NUM_ADC_CHANNELS];
+
+/* Scan ADC so that adcdata[channel] gets updated */
+unsigned short adc_scan(int channel)
+{
+    unsigned int adc_data_1;
+    unsigned int adc_data_2;
+
+    /* Initialise */
+    ADC_ADDR=0x130;
+    ADC_STATUS=0;   /* 4 bytes, 1 per channel. Each byte is 0 if the channel is
+                       off, 0x40 if the channel is on */
+
+    /* Enable Channel */
+    ADC_ADDR |= (0x1000000<<channel);
+
+    /* Start? */
+    ADC_ADDR |= 0x20000000;
+    ADC_ADDR |= 0x80000000;
+
+    /* ADC_DATA_1 and ADC_DATA_2 are both four bytes, one byte per channel.
+       For each channel, ADC_DATA_1 stores the 8-bit msb, ADC_DATA_2 stores the
+       2-bit lsb (in bits 0 and 1). Each channel is 10 bits total. */
+    adc_data_1 = ((ADC_DATA_1 >> (8*channel)) & 0xff);
+    adc_data_2 = ((ADC_DATA_2 >> (8*channel+6)) & 0x3);
+
+    adcdata[channel] = (adc_data_1<<2 | adc_data_2);
+
+    return adcdata[channel];
+}
+
+/* Read 10-bit channel data */
+unsigned short adc_read(int channel)
+{
+    return adcdata[channel];
+}
+
+static int adc_counter;
+
+static void adc_tick(void)
+{
+    if(++adc_counter == HZ)
+    {
+        adc_counter = 0;
+        adc_scan(ADC_0);
+        adc_scan(ADC_1);
+        adc_scan(ADC_2);
+        adc_scan(ADC_3);
+    }
+}
+
+void adc_init(void)
+{
+    /* Enable ADC */
+    ADC_ENABLE_ADDR |= ADC_ENABLE;
+
+    /* Initialise */
+    ADC_INIT=0;
+
+    /* Force a scan of all channels to get initial values */
+    adc_scan(ADC_0);
+    adc_scan(ADC_1);
+    adc_scan(ADC_2);
+    adc_scan(ADC_3);
+
+    tick_add_task(adc_tick);
+}
-- 
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