From e286b0bbc04a34c181978efce19c6d0814e228c0 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Wed, 30 Jun 2010 02:02:46 +0000 Subject: Remove atomic register bit manipulation functions from i.MX and s3c target code and introduce generic functions for ARM (bitmod32, bitset32, and bitclr32). Multiprocessor support is possible but just not implemented at the moment, only interrupt lockout. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/s3c2440/adc-s3c2440.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'firmware/target/arm/s3c2440/adc-s3c2440.c') diff --git a/firmware/target/arm/s3c2440/adc-s3c2440.c b/firmware/target/arm/s3c2440/adc-s3c2440.c index f42a3d2b6a..2e0cf8a512 100644 --- a/firmware/target/arm/s3c2440/adc-s3c2440.c +++ b/firmware/target/arm/s3c2440/adc-s3c2440.c @@ -39,7 +39,7 @@ void adc_init(void) int i; /* Turn on the ADC PCLK */ - s3c_regset32(&CLKCON, 1<<15); + bitset32(&CLKCON, 1<<15); /* Set channel 0, normal mode, disable "start by read" */ ADCCON &= ~(0x3F); -- cgit v1.2.3