From 9ac9cc6024271f806af23a84903d809eb145dc60 Mon Sep 17 00:00:00 2001 From: Karl Kurbjun Date: Sun, 23 Sep 2007 23:08:39 +0000 Subject: Working DM320 interrupts, changed the way registers are accessed in spi and uart drivers. Uart might be broken with interrupts - buttons on remote don't seem to respond when interrupts are enabled. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14836 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/olympus/mrobe-500/ata-mr500.c | 4 +++ .../target/arm/olympus/mrobe-500/button-mr500.c | 4 +-- firmware/target/arm/olympus/mrobe-500/crt0.S | 2 +- .../target/arm/olympus/mrobe-500/kernel-mr500.c | 14 +++++---- firmware/target/arm/olympus/mrobe-500/spi-mr500.c | 6 ++-- .../target/arm/olympus/mrobe-500/system-mr500.c | 32 +++++++++++-------- .../target/arm/olympus/mrobe-500/timer-target.h | 2 +- firmware/target/arm/olympus/mrobe-500/uart-mr500.c | 36 +++++++--------------- 8 files changed, 49 insertions(+), 51 deletions(-) (limited to 'firmware/target/arm/olympus') diff --git a/firmware/target/arm/olympus/mrobe-500/ata-mr500.c b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c index 171097f823..2b018194d2 100644 --- a/firmware/target/arm/olympus/mrobe-500/ata-mr500.c +++ b/firmware/target/arm/olympus/mrobe-500/ata-mr500.c @@ -62,6 +62,10 @@ void ata_device_init(void) { /* ATA reset */ ATA_RESET_DISABLE; /* Set the pin to disable an active low reset */ + + /* set GIO17 (ATA power) on and output */ + IO_GIO_BITSET1&=~(1<<1); + IO_GIO_DIR1&=~(1<<1); } #if !defined(BOOTLOADER) diff --git a/firmware/target/arm/olympus/mrobe-500/button-mr500.c b/firmware/target/arm/olympus/mrobe-500/button-mr500.c index 87ab80a5e5..7410875fd1 100644 --- a/firmware/target/arm/olympus/mrobe-500/button-mr500.c +++ b/firmware/target/arm/olympus/mrobe-500/button-mr500.c @@ -37,7 +37,7 @@ void button_init_device(void) { /* GIO is the power button, set as input */ - outw(inw(IO_GIO_DIR0)|0x01, IO_GIO_DIR0); + IO_GIO_DIR0|=0x01; } inline bool button_hold(void) @@ -52,7 +52,7 @@ int button_read_device(void) int i = 0; int btn = BUTTON_NONE, timeout = BUTTON_TIMEOUT; - if ((inw(IO_GIO_BITSET0)&0x01) == 0) + if ((IO_GIO_BITSET0&0x01) == 0) btn |= BUTTON_POWER; uartHeartbeat(); diff --git a/firmware/target/arm/olympus/mrobe-500/crt0.S b/firmware/target/arm/olympus/mrobe-500/crt0.S index 672e917cc8..a7c1131367 100755 --- a/firmware/target/arm/olympus/mrobe-500/crt0.S +++ b/firmware/target/arm/olympus/mrobe-500/crt0.S @@ -102,7 +102,7 @@ start: ldr sp, =irq_stack msr cpsr_c, #0xdb ldr sp, =irq_stack - /* Switch to supervisor mode */ + /* Switch to supervisor mode (no IRQ) */ msr cpsr_c, #0xd3 ldr sp, =stackend diff --git a/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c b/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c index 3ac0730691..487bc2d7d2 100644 --- a/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c +++ b/firmware/target/arm/olympus/mrobe-500/kernel-mr500.c @@ -29,20 +29,22 @@ void tick_start(unsigned int interval_in_ms) { IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_STOP; - /* Setup the Prescalar */ - IO_TIMER1_TMPRSCL = CONFIG_TIMER1_TMPRSCL; + /* Setup the Prescalar (Divide by 10) + * Based on linux/include/asm-arm/arch-integrator/timex.h + */ + IO_TIMER1_TMPRSCL = 0x000A; /* Setup the Divisor */ - IO_TIMER1_TMDIV = CONFIG_TIMER1_TMDIV; - + IO_TIMER1_TMDIV = (TIMER_FREQ / (10*1000))*interval_in_ms; + /* Turn Timer1 to Free Run mode */ IO_TIMER1_TMMD = CONFIG_TIMER1_TMMD_FREE_RUN; - + /* Enable the interrupt */ IO_INTC_EINT0 |= 1<>2)-1; panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); } @@ -105,18 +105,13 @@ void irq_handler(void) /* * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c */ - printf("INTERUPT!"); - asm volatile ( - "sub lr, lr, #4 \r\n" - "stmfd sp!, {r0-r3, ip, lr} \r\n" - "mov r0, #0x00030000 \r\n" - "ldr r0, [r0, #0x518] \r\n" - "ldr r1, =irqvector \r\n" - "ldr r1, [r1, r0, lsl #2] \r\n" - "mov lr, pc \r\n" - "bx r1 \r\n" - "ldmfd sp!, {r0-r3, ip, pc}^ \r\n" - ); + + asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ + "sub sp, sp, #8 \n"); /* Reserve stack */ + irqvector[(IO_INTC_IRQENTRY0>>2)-1](); + asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ + "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ + "subs pc, lr, #4 \n"); /* Return from FIQ */ } void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); @@ -144,6 +139,11 @@ void system_reboot(void) } +void enable_interrupts (void) +{ + asm volatile ("msr cpsr_c, #0x13" ); +} + void system_init(void) { /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ @@ -166,6 +166,12 @@ void system_init(void) IO_INTC_FISEL0 = 0; IO_INTC_FISEL1 = 0; IO_INTC_FISEL2 = 0; + + /* set GIO26 (reset pin) to output and low */ + IO_GIO_BITSET1&=~(1<<10); + IO_GIO_DIR1&=~(1<<10); + + enable_interrupts(); } int system_memory_guard(int newmode) diff --git a/firmware/target/arm/olympus/mrobe-500/timer-target.h b/firmware/target/arm/olympus/mrobe-500/timer-target.h index 71cfa72e9d..4abe75ad82 100644 --- a/firmware/target/arm/olympus/mrobe-500/timer-target.h +++ b/firmware/target/arm/olympus/mrobe-500/timer-target.h @@ -20,7 +20,7 @@ #define TIMER_TARGET_H /* timer is based on PCLK and minimum division is 2 */ -#define TIMER_FREQ (49156800/2) +#define TIMER_FREQ (27000000) bool __timer_set(long cycles, bool set); bool __timer_register(void); diff --git a/firmware/target/arm/olympus/mrobe-500/uart-mr500.c b/firmware/target/arm/olympus/mrobe-500/uart-mr500.c index f8208f8717..99cf0f2d36 100644 --- a/firmware/target/arm/olympus/mrobe-500/uart-mr500.c +++ b/firmware/target/arm/olympus/mrobe-500/uart-mr500.c @@ -22,21 +22,7 @@ #include "system.h" /* UART 0/1 */ -#define IO_UART0_DTRR 0x0300 -#define IO_UART0_BRSR 0x0302 -#define IO_UART0_MSR 0x0304 -#define IO_UART0_RFCR 0x0306 -#define IO_UART0_TFCR 0x0308 -#define IO_UART0_LCR 0x030A -#define IO_UART0_SR 0x030C -#define IO_UART1_DTRR 0x0380 -#define IO_UART1_BRSR 0x0382 -#define IO_UART1_MSR 0x0384 -#define IO_UART1_RFCR 0x0386 -#define IO_UART1_TFCR 0x0388 -#define IO_UART1_LCR 0x038A -#define IO_UART1_SR 0x038C #define CONFIG_UART_BRSR 87 void do_checksums(char *data, int len, char *xor, char *add) @@ -53,16 +39,16 @@ void do_checksums(char *data, int len, char *xor, char *add) void uartSetup(void) { // 8-N-1 - outw(0x8000, IO_UART1_MSR); - outw(CONFIG_UART_BRSR, IO_UART1_BRSR); + IO_UART1_MSR=0x8000; + IO_UART1_BRSR=CONFIG_UART_BRSR; } void uartPutc(char ch) { // Wait for room in FIFO - while ((inw(IO_UART1_TFCR) & 0x3f) >= 0x20); + while ((IO_UART1_TFCR & 0x3f) >= 0x20); // Write character - outw(ch, IO_UART1_DTRR); + IO_UART1_DTRR=ch; } // Unsigned integer to ASCII hexadecimal conversion @@ -88,17 +74,17 @@ void uartGets(char *str, unsigned int size) { char ch; // Wait for FIFO to contain something - while ((inw(IO_UART1_RFCR) & 0x3f) == 0); + while ((IO_UART1_RFCR & 0x3f) == 0); // Read character - ch = (char)inw(IO_UART1_DTRR); + ch = (char)IO_UART1_DTRR; // Echo character back - outw(ch, IO_UART1_DTRR); + IO_UART1_DTRR=ch; // If CR, also echo LF, null-terminate, and return if (ch == '\r') { - outw('\n', IO_UART1_DTRR); + IO_UART1_DTRR='\n'; if (size) { *str++ = '\0'; } @@ -115,8 +101,8 @@ void uartGets(char *str, unsigned int size) { int uartPollch(unsigned int ticks) { while (ticks--) { - if (inw(IO_UART1_RFCR) & 0x3f) { - return inw(IO_UART1_DTRR) & 0xff; + if (IO_UART1_RFCR & 0x3f) { + return IO_UART1_DTRR & 0xff; } } @@ -125,7 +111,7 @@ int uartPollch(unsigned int ticks) { bool uartAvailable(void) { - return (inw(IO_UART1_RFCR) & 0x3f)?true:false; + return (IO_UART1_RFCR & 0x3f)?true:false; } void uartHeartbeat(void) -- cgit v1.2.3