From 0b6d65b09e7c12d7c0469e942518d913f7fd9376 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Sun, 30 Nov 2008 16:36:32 +0000 Subject: Sansa AMS: Use a valid PLL setting (248MHz aka maximum fclk) Fix lcd drivers which stopped working after changing the PLL. Move set_cpu_frequency() to a place where it is actually used. Remove enable_irq() call already done by the bootloader git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19276 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/lcd-ssd1815.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'firmware/target/arm/lcd-ssd1815.c') diff --git a/firmware/target/arm/lcd-ssd1815.c b/firmware/target/arm/lcd-ssd1815.c index e9b6bff579..6bbad19ff8 100644 --- a/firmware/target/arm/lcd-ssd1815.c +++ b/firmware/target/arm/lcd-ssd1815.c @@ -102,9 +102,7 @@ void lcd_write_data(const fb_data* p_bytes, int count) static inline void ams3525_dbop_init(void) { - int clkdiv = 4 - 1; - - CGU_DBOP |= (1<<3) /* clk enable */ | clkdiv /* clkdiv: 3 bits */ ; + CGU_DBOP |= (1<<3) /* clk enable */ | (3 - 1) /* clkdiv: 3 bits */ ; GPIOB_AFSEL = 0x0f; /* DBOP on pin 3:0 */ GPIOC_AFSEL = 0xff; /* DBOP on pins 7:0 */ -- cgit v1.2.3