From d7ef2474120f2a009af139754f6d387c8e83c949 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Fri, 7 May 2010 10:53:19 +0000 Subject: i.MX31/Gigabeat S minor cleaning: Make HW access more obvious in places I forgot to do earlier. Reduce the number of structs that need to be filled-out for some drivers just to simplify a little. Change some types. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25870 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/imx31/gpio-imx31.c | 125 +++++++++++++++++---------------- 1 file changed, 66 insertions(+), 59 deletions(-) (limited to 'firmware/target/arm/imx31/gpio-imx31.c') diff --git a/firmware/target/arm/imx31/gpio-imx31.c b/firmware/target/arm/imx31/gpio-imx31.c index 944f70eae3..42d0a42188 100644 --- a/firmware/target/arm/imx31/gpio-imx31.c +++ b/firmware/target/arm/imx31/gpio-imx31.c @@ -31,67 +31,85 @@ extern void UIE_VECTOR(void); /* Event lists are allocated for the specific target */ #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void); -extern const struct gpio_event_list gpio1_event_list; +extern const struct gpio_event gpio1_events[GPIO1_NUM_EVENTS]; #endif #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void); -extern const struct gpio_event_list gpio2_event_list; +extern const struct gpio_event gpio2_events[GPIO2_NUM_EVENTS]; #endif #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void); -extern const struct gpio_event_list gpio3_event_list; +extern const struct gpio_event gpio3_events[GPIO3_NUM_EVENTS]; #endif -static struct gpio_module_descriptor +#define DR (0x00 / sizeof (unsigned long)) /* 00h */ +#define GDIR (0x04 / sizeof (unsigned long)) /* 04h */ +#define PSR (0x08 / sizeof (unsigned long)) /* 08h */ +#define ICR (0x0C / sizeof (unsigned long)) /* 0Ch ICR1,2 */ +#define IMR (0x14 / sizeof (unsigned long)) /* 14h */ +#define ISR (0x18 / sizeof (unsigned long)) + +static const struct gpio_module_desc { - struct gpio_map * const base; /* Module base address */ - enum IMX31_INT_LIST ints; /* AVIC int number */ - void (*handler)(void); /* Interrupt function */ - const struct gpio_event_list *list; /* Event handler list */ + volatile unsigned long * const base; /* Module base address */ + void (* const handler)(void); /* Interrupt function */ + const struct gpio_event * const events; /* Event handler list */ + const uint8_t ints; /* AVIC int number */ + const uint8_t int_priority; /* AVIC int priority */ + const uint8_t count; /* Number of events */ } gpio_descs[GPIO_NUM_GPIO] = { #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) { - .base = (struct gpio_map *)GPIO1_BASE_ADDR, - .ints = INT_GPIO1, - .handler = GPIO1_HANDLER, + .base = (unsigned long *)GPIO1_BASE_ADDR, + .ints = INT_GPIO1, + .handler = GPIO1_HANDLER, + .events = gpio1_events, + .count = GPIO1_NUM_EVENTS, + .int_priority = GPIO1_INT_PRIO }, #endif #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) { - .base = (struct gpio_map *)GPIO2_BASE_ADDR, - .ints = INT_GPIO2, - .handler = GPIO2_HANDLER, + .base = (unsigned long *)GPIO2_BASE_ADDR, + .ints = INT_GPIO2, + .handler = GPIO2_HANDLER, + .events = gpio2_events, + .count = GPIO2_NUM_EVENTS, + .int_priority = GPIO2_INT_PRIO }, #endif #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) { - .base = (struct gpio_map *)GPIO3_BASE_ADDR, - .ints = INT_GPIO3, - .handler = GPIO3_HANDLER, + .base = (unsigned long *)GPIO3_BASE_ADDR, + .ints = INT_GPIO3, + .handler = GPIO3_HANDLER, + .events = gpio3_events, + .count = GPIO3_NUM_EVENTS, + .int_priority = GPIO3_INT_PRIO, }, #endif }; -static void gpio_call_events(const struct gpio_module_descriptor * const desc) +static void gpio_call_events(enum gpio_module_number gpio) { - const struct gpio_event_list * const list = desc->list; - struct gpio_map * const base = desc->base; + const struct gpio_module_desc * const desc = &gpio_descs[gpio]; + volatile unsigned long * const base = desc->base; const struct gpio_event * event, *event_last; - /* Intersect pending and unmasked bits */ - uint32_t pnd = base->isr & base->imr; + event = desc->events; + event_last = event + desc->count; - event = list->events; - event_last = event + list->count; + /* Intersect pending and unmasked bits */ + unsigned long pnd = base[ISR] & base[IMR]; /* Call each event handler in order */ /* .count is surely expected to be > 0 */ do { - uint32_t mask = event->mask; + unsigned long mask = event->mask; if (pnd & mask) { @@ -114,74 +132,63 @@ static void gpio_call_events(const struct gpio_module_descriptor * const desc) #if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO1_HANDLER(void) { - gpio_call_events(&gpio_descs[GPIO1_NUM]); + gpio_call_events(GPIO1_NUM); } #endif #if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO2_HANDLER(void) { - gpio_call_events(&gpio_descs[GPIO2_NUM]); + gpio_call_events(GPIO2_NUM); } #endif #if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) static __attribute__((interrupt("IRQ"))) void GPIO3_HANDLER(void) { - gpio_call_events(&gpio_descs[GPIO3_NUM]); + gpio_call_events(GPIO3_NUM); } #endif void gpio_init(void) { /* Mask-out GPIO interrupts - enable what's wanted later */ - GPIO1_IMR = 0; - GPIO2_IMR = 0; - GPIO3_IMR = 0; - - /* Init the externally-defined event lists for each port */ -#if (GPIO_EVENT_MASK & USE_GPIO1_EVENTS) - gpio_descs[GPIO1_NUM].list = &gpio1_event_list; -#endif -#if (GPIO_EVENT_MASK & USE_GPIO2_EVENTS) - gpio_descs[GPIO2_NUM].list = &gpio2_event_list; -#endif -#if (GPIO_EVENT_MASK & USE_GPIO3_EVENTS) - gpio_descs[GPIO3_NUM].list = &gpio3_event_list; -#endif + int i; + for (i = 0; i < GPIO_NUM_GPIO; i++) + gpio_descs[i].base[IMR] = 0; } bool gpio_enable_event(enum gpio_event_ids id) { - const struct gpio_module_descriptor * const desc = &gpio_descs[id >> 5]; - const struct gpio_event * const event = &desc->list->events[id & 31]; - struct gpio_map * const base = desc->base; - volatile uint32_t *icr; - uint32_t mask, line; - uint32_t imr; + const struct gpio_module_desc * const desc = &gpio_descs[id >> 5]; + const struct gpio_event * const event = &desc->events[id & 31]; + volatile unsigned long * const base = desc->base; + volatile unsigned long *icr; + unsigned long mask, line; + unsigned long imr; int shift; int oldlevel = disable_irq_save(); - imr = base->imr; + imr = base[IMR]; if (imr == 0) { /* First enabled interrupt for this GPIO */ - avic_enable_int(desc->ints, INT_TYPE_IRQ, desc->list->ints_priority, + avic_enable_int(desc->ints, INT_TYPE_IRQ, desc->int_priority, desc->handler); } /* Set the line sense */ line = find_first_set_bit(event->mask); - icr = &base->icr[line >> 4]; - shift = (line & 15) << 1; + icr = &base[ICR + (line >> 4)]; + shift = 2*(line & 15); mask = GPIO_SENSE_CONFIG_MASK << shift; *icr = (*icr & ~mask) | ((event->sense << shift) & mask); /* Unmask the line */ - base->imr = imr | event->mask; + base[IMR] = imr | event->mask; restore_irq(oldlevel); @@ -190,18 +197,18 @@ bool gpio_enable_event(enum gpio_event_ids id) void gpio_disable_event(enum gpio_event_ids id) { - const struct gpio_module_descriptor * const desc = &gpio_descs[id >> 5]; - const struct gpio_event * const event = &desc->list->events[id & 31]; - struct gpio_map * const base = desc->base; - uint32_t imr; + const struct gpio_module_desc * const desc = &gpio_descs[id >> 5]; + const struct gpio_event * const event = &desc->events[id & 31]; + volatile unsigned long * const base = desc->base; + unsigned long imr; int oldlevel = disable_irq_save(); /* Remove bit from mask */ - imr = base->imr & ~event->mask; + imr = base[IMR] & ~event->mask; /* Mask the line */ - base->imr = imr; + base[IMR] = imr; if (imr == 0) { -- cgit v1.2.3