From a420561bf8315f60c290ea41aaa7e80f410c592d Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Sat, 8 May 2010 07:45:34 +0000 Subject: Gigabeat S: Reclaim about 800K of memory that was laying unused. Get rid of DEVBSS_ATTR for this target and implement as NOCACHEBSS_ATTR. Plugin and codec buffers move so all that is now incompatible (do full update). No version increase for plugins/codecs because the loader will reject them. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25895 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/imx31/boot.lds | 44 +++++++++++++++++++++++++++++--------- 1 file changed, 34 insertions(+), 10 deletions(-) (limited to 'firmware/target/arm/imx31/boot.lds') diff --git a/firmware/target/arm/imx31/boot.lds b/firmware/target/arm/imx31/boot.lds index e08b4bfb7a..6030044c85 100644 --- a/firmware/target/arm/imx31/boot.lds +++ b/firmware/target/arm/imx31/boot.lds @@ -19,8 +19,7 @@ STARTUP(target/arm/imx31/crt0.o) MEMORY { DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE - DEVBSS : ORIGIN = CSD0_BASE_ADDR + (MEMORYSIZE*0x100000 - 0x100000), \ - LENGTH = 0x100000 - FRAME_SIZE - TTB_SIZE + QHARRAY : ORIGIN = QHARRAY_PHYS_ADDR, LENGTH = QHARRAY_SIZE } SECTIONS @@ -59,6 +58,18 @@ SECTIONS . = ALIGN(0x4); _dataend = . ; } > DRAM + +#if 0 /* Unneeded at the moment */ + /* .ncdata section is placed at uncached physical alias address and is + * loaded at the proper cached virtual address - no copying is + * performed in the init code */ + .ncdata . + NOCACHE_BASE : + { + . = ALIGN(CACHEALIGN_SIZE); /* >= Cache line boundary */ + *(.ncdata*) + . = ALIGN(CACHEALIGN_SIZE); /* >= Cache line boundary */ + } AT> DRAM +#endif .vectors 0x0 : { @@ -79,20 +90,33 @@ SECTIONS stackend = .; } > IRAM + /* .bss and .ncbss are treated as a single section to use one init loop to + * zero it - note "_edata" and "_end" */ .bss (NOLOAD) : { _edata = .; *(.bss*); *(.ibss); *(COMMON) - _end = .; + . = ALIGN(0x4); + } > DRAM + + .ncbss . + NOCACHE_BASE (NOLOAD) : + { + . = ALIGN(CACHEALIGN_SIZE); /* >= Cache line boundary */ + *(.ncbss*) + . = ALIGN(CACHEALIGN_SIZE); /* >= Cache line boundary */ + } AT> DRAM + + .endaddr . - NOCACHE_BASE (NOLOAD) : + { + _end = .; } > DRAM - - .devbss (NOLOAD) : + + .qharray (NOLOAD) : { - _devbssdata = .; - *(.qharray) - *(.devbss*) - _devbssend = .; - } > DEVBSS + _qharray = .; + *(.qharray) + _qharrayend = .; + } > QHARRAY } -- cgit v1.2.3