From 7c5b65b9d234f819447195e3f852d9b59a225813 Mon Sep 17 00:00:00 2001 From: Amaury Pouly Date: Sun, 16 Jun 2013 17:16:48 +0200 Subject: imx233: rewrite power using new registers Change-Id: Ifbee91161220419f4d1750672b5c4ae3537cefca --- .../arm/imx233/creative-zenxfi3/button-zenxfi3.c | 2 +- firmware/target/arm/imx233/power-imx233.c | 162 +++++++++--------- firmware/target/arm/imx233/power-imx233.h | 182 ++++----------------- firmware/target/arm/imx233/powermgmt-imx233.c | 50 +++--- .../arm/imx233/sansa-fuzeplus/button-fuzeplus.c | 2 +- firmware/target/arm/imx233/usb-imx233.c | 2 +- 6 files changed, 144 insertions(+), 256 deletions(-) (limited to 'firmware/target/arm/imx233') diff --git a/firmware/target/arm/imx233/creative-zenxfi3/button-zenxfi3.c b/firmware/target/arm/imx233/creative-zenxfi3/button-zenxfi3.c index f2e0bb20bc..70355bc24c 100644 --- a/firmware/target/arm/imx233/creative-zenxfi3/button-zenxfi3.c +++ b/firmware/target/arm/imx233/creative-zenxfi3/button-zenxfi3.c @@ -176,7 +176,7 @@ int button_read_device(void) res |= BUTTON_VOL_DOWN; if(!(mask & 0x100)) res |= BUTTON_VOL_UP; - if(__XTRACT(HW_POWER_STS, PSWITCH) != 0 && power_ignore_counter == 0) + if(BF_RD(POWER_STS, PSWITCH) != 0 && power_ignore_counter == 0) res |= BUTTON_POWER; return res | touchpad_btns; } diff --git a/firmware/target/arm/imx233/power-imx233.c b/firmware/target/arm/imx233/power-imx233.c index 49323f6ffd..9c00178f1a 100644 --- a/firmware/target/arm/imx233/power-imx233.c +++ b/firmware/target/arm/imx233/power-imx233.c @@ -38,76 +38,76 @@ struct current_step_bit_t /* in decreasing order */ static struct current_step_bit_t g_charger_current_bits[] = { - { 400, HW_POWER_CHARGE__BATTCHRG_I__400mA }, - { 200, HW_POWER_CHARGE__BATTCHRG_I__200mA }, - { 100, HW_POWER_CHARGE__BATTCHRG_I__100mA }, - { 50, HW_POWER_CHARGE__BATTCHRG_I__50mA }, - { 20, HW_POWER_CHARGE__BATTCHRG_I__20mA }, - { 10, HW_POWER_CHARGE__BATTCHRG_I__10mA } + { 400, BV_POWER_CHARGE_BATTCHRG_I__400mA }, + { 200, BV_POWER_CHARGE_BATTCHRG_I__200mA }, + { 100, BV_POWER_CHARGE_BATTCHRG_I__100mA }, + { 50, BV_POWER_CHARGE_BATTCHRG_I__50mA }, + { 20, BV_POWER_CHARGE_BATTCHRG_I__20mA }, + { 10, BV_POWER_CHARGE_BATTCHRG_I__10mA } }; /* in decreasing order */ static struct current_step_bit_t g_charger_stop_current_bits[] = { - { 100, HW_POWER_CHARGE__STOP_ILIMIT__100mA }, - { 50, HW_POWER_CHARGE__STOP_ILIMIT__50mA }, - { 20, HW_POWER_CHARGE__STOP_ILIMIT__20mA }, - { 10, HW_POWER_CHARGE__STOP_ILIMIT__10mA } + { 100, BV_POWER_CHARGE_STOP_ILIMIT__100mA }, + { 50, BV_POWER_CHARGE_STOP_ILIMIT__50mA }, + { 20, BV_POWER_CHARGE_STOP_ILIMIT__20mA }, + { 10, BV_POWER_CHARGE_STOP_ILIMIT__10mA } }; /* in decreasing order */ static struct current_step_bit_t g_4p2_charge_limit_bits[] = { - { 400, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__400mA }, - { 200, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__200mA }, - { 100, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__100mA }, - { 50, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__50mA }, - { 20, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__20mA }, - { 10, HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__10mA } + { 400, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__400mA }, + { 200, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__200mA }, + { 100, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__100mA }, + { 50, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__50mA }, + { 20, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__20mA }, + { 10, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__10mA } }; void INT_VDD5V(void) { - if(HW_POWER_CTRL & HW_POWER_CTRL__VBUSVALID_IRQ) + if(BF_RD(POWER_CTRL, VBUSVALID_IRQ)) { - if(HW_POWER_STS & HW_POWER_STS__VBUSVALID) + if(BF_RD(POWER_STS, VBUSVALID)) usb_insert_int(); else usb_remove_int(); /* reverse polarity */ - __REG_TOG(HW_POWER_CTRL) = HW_POWER_CTRL__POLARITY_VBUSVALID; + BF_TOG(POWER_CTRL, POLARITY_VBUSVALID); /* enable int */ - __REG_CLR(HW_POWER_CTRL) = HW_POWER_CTRL__VBUSVALID_IRQ; + BF_CLR(POWER_CTRL, VBUSVALID_IRQ); } } void imx233_power_init(void) { /* setup vbusvalid parameters: set threshold to 4v and power up comparators */ - __REG_CLR(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__VBUSVALID_TRSH_BM; - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__VBUSVALID_TRSH_4V | - HW_POWER_5VCTRL__PWRUP_VBUS_CMPS; + BF_CLR(POWER_5VCTRL, VBUSVALID_TRSH); + BF_SETV(POWER_5VCTRL, VBUSVALID_TRSH, 1); + BF_SET(POWER_5VCTRL, PWRUP_VBUS_CMPS); /* enable vbusvalid detection method for the dcdc (improves efficiency) */ - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__VBUSVALID_5VDETECT; - /* clear vbusvalid irq and set correct polarity */ - __REG_CLR(HW_POWER_CTRL) = HW_POWER_CTRL__VBUSVALID_IRQ; - if(HW_POWER_STS & HW_POWER_STS__VBUSVALID) - __REG_CLR(HW_POWER_CTRL) = HW_POWER_CTRL__POLARITY_VBUSVALID; + BF_SET(POWER_5VCTRL, VBUSVALID_5VDETECT); + BF_CLR(POWER_CTRL, VBUSVALID_IRQ); + if(BF_RD(POWER_STS, VBUSVALID)) + BF_CLR(POWER_CTRL, POLARITY_VBUSVALID); else - __REG_SET(HW_POWER_CTRL) = HW_POWER_CTRL__POLARITY_VBUSVALID; - __REG_SET(HW_POWER_CTRL) = HW_POWER_CTRL__ENIRQ_VBUS_VALID; + BF_SET(POWER_CTRL, POLARITY_VBUSVALID); + BF_SET(POWER_CTRL, ENIRQ_VBUS_VALID); imx233_icoll_enable_interrupt(INT_SRC_VDD5V, true); /* setup linear regulator offsets to 25 mV below to prevent contention between * linear regulators and DCDC */ - __FIELD_SET(HW_POWER_VDDDCTRL, LINREG_OFFSET, 2); - __FIELD_SET(HW_POWER_VDDACTRL, LINREG_OFFSET, 2); - __FIELD_SET(HW_POWER_VDDIOCTRL, LINREG_OFFSET, 2); + BF_WR(POWER_VDDDCTRL, LINREG_OFFSET, 2); + BF_WR(POWER_VDDACTRL, LINREG_OFFSET, 2); + BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET, 2); /* enable DCDC (more efficient) */ - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__ENABLE_DCDC; + BF_SET(POWER_5VCTRL, ENABLE_DCDC); /* enable a few bits controlling the DC-DC as recommended by Freescale */ - __REG_SET(HW_POWER_LOOPCTRL) = HW_POWER_LOOPCTRL__TOGGLE_DIF | - HW_POWER_LOOPCTRL__EN_CM_HYST; - __FIELD_SET(HW_POWER_LOOPCTRL, EN_RCSCALE, HW_POWER_LOOPCTRL__EN_RCSCALE__2X); + BF_SET(POWER_LOOPCTRL, TOGGLE_DIF); + BF_SET(POWER_LOOPCTRL, EN_CM_HYST); + BF_CLR(POWER_LOOPCTRL, EN_RCSCALE); + BF_SETV(POWER_LOOPCTRL, EN_RCSCALE, 1); } void power_init(void) @@ -126,7 +126,7 @@ void power_off(void) imx233_set_gpio_output(0, 9, true); #endif /* power down */ - HW_POWER_RESET = HW_POWER_RESET__UNLOCK | HW_POWER_RESET__PWD; + HW_POWER_RESET = BM_OR2(POWER_RESET, UNLOCK, PWD); while(1); } @@ -138,24 +138,24 @@ unsigned int power_input_status(void) bool charging_state(void) { - return HW_POWER_STS & HW_POWER_STS__CHRGSTS; + return BF_RD(POWER_STS, CHRGSTS); } void imx233_power_set_charge_current(unsigned current) { - __REG_CLR(HW_POWER_CHARGE) = HW_POWER_CHARGE__BATTCHRG_I_BM; + BF_CLR(POWER_CHARGE, BATTCHRG_I); /* find closest current LOWER THAN OR EQUAL TO the expected current */ for(unsigned i = 0; i < ARRAYLEN(g_charger_current_bits); i++) if(current >= g_charger_current_bits[i].current) { current -= g_charger_current_bits[i].current; - __REG_SET(HW_POWER_CHARGE) = g_charger_current_bits[i].bit; + BF_SETV(POWER_CHARGE, BATTCHRG_I, g_charger_current_bits[i].bit); } } void imx233_power_set_stop_current(unsigned current) { - __REG_CLR(HW_POWER_CHARGE) = HW_POWER_CHARGE__STOP_ILIMIT_BM; + BF_CLR(POWER_CHARGE, STOP_ILIMIT); /* find closest current GREATHER THAN OR EQUAL TO the expected current */ unsigned sum = 0; for(unsigned i = 0; i < ARRAYLEN(g_charger_stop_current_bits); i++) @@ -166,7 +166,7 @@ void imx233_power_set_stop_current(unsigned current) if(current > sum) { current -= g_charger_stop_current_bits[i].current; - __REG_SET(HW_POWER_CHARGE) = g_charger_stop_current_bits[i].bit; + BF_SETV(POWER_CHARGE, STOP_ILIMIT, g_charger_stop_current_bits[i].bit); } } } @@ -191,17 +191,17 @@ static struct .min = HW_POWER_##name##CTRL__TRG_MIN, \ .step = HW_POWER_##name##CTRL__TRG_STEP, \ .reg = &HW_POWER_##name##CTRL, \ - .trg_bm = HW_POWER_##name##CTRL__TRG_BM, \ - .trg_bp = HW_POWER_##name##CTRL__TRG_BP, \ + .trg_bm = BM_POWER_##name##CTRL_TRG, \ + .trg_bp = BP_POWER_##name##CTRL_TRG, \ .flags = mask #define ADD_REGULATOR_BO(name) \ - .bo_bm = HW_POWER_##name##CTRL__BO_OFFSET_BM, \ - .bo_bp = HW_POWER_##name##CTRL__BO_OFFSET_BP + .bo_bm = BM_POWER_##name##CTRL_BO_OFFSET, \ + .bo_bp = BP_POWER_##name##CTRL_BO_OFFSET #define ADD_REGULATOR_LINREG(name) \ - .linreg_bm = HW_POWER_##name##CTRL__ENABLE_LINREG + .linreg_bm = BM_POWER_##name##CTRL_ENABLE_LINREG #define ADD_REGULATOR_LINREG_OFFSET(name) \ - .linreg_offset_bm = HW_POWER_##name##CTRL__LINREG_OFFSET_BM, \ - .linreg_offset_bp = HW_POWER_##name##CTRL__LINREG_OFFSET_BP + .linreg_offset_bm = BM_POWER_##name##CTRL_LINREG_OFFSET, \ + .linreg_offset_bp = BP_POWER_##name##CTRL_LINREG_OFFSET [REGULATOR_VDDD] = { ADD_REGULATOR(VDDD, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET), @@ -257,7 +257,7 @@ void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned value_mv, unsigned raw_val = (value_mv - regulator_info[reg].min) / regulator_info[reg].step; unsigned raw_bo_offset = (value_mv - brownout_mv) / regulator_info[reg].step; // clear dc-dc ok flag - __REG_SET(HW_POWER_CTRL) = HW_POWER_CTRL__DC_OK_IRQ; + BF_SET(POWER_CTRL, DC_OK_IRQ); // update uint32_t reg_val = (*regulator_info[reg].reg) & ~regulator_info[reg].trg_bm; reg_val |= raw_val << regulator_info[reg].trg_bp; @@ -271,12 +271,12 @@ void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned value_mv, * If DC-DC is used, we can use the DCDC_OK irq * Otherwise it is unreliable (doesn't work when lowering voltage on linregs) * It usually takes between 0.5ms and 2.5ms */ - if(!(HW_POWER_5VCTRL & HW_POWER_5VCTRL__ENABLE_DCDC)) + if(!BF_RD(POWER_5VCTRL, ENABLE_DCDC)) panicf("regulator %d: wait for voltage stabilize in linreg mode !", reg); unsigned timeout = current_tick + (HZ * 20) / 1000; - while(!(HW_POWER_CTRL & HW_POWER_CTRL__DC_OK_IRQ) || !TIME_AFTER(current_tick, timeout)) + while(!BF_RD(POWER_CTRL, DC_OK_IRQ) || !TIME_AFTER(current_tick, timeout)) yield(); - if(!(HW_POWER_CTRL & HW_POWER_CTRL__DC_OK_IRQ)) + if(!BF_RD(POWER_CTRL, DC_OK_IRQ)) panicf("regulator %d: failed to stabilize", reg); } @@ -311,55 +311,57 @@ void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg, struct imx233_power_info_t imx233_power_get_info(unsigned flags) { static int dcdc_freqsel[8] = { - [HW_POWER_MISC__FREQSEL__RES] = 0, - [HW_POWER_MISC__FREQSEL__20MHz] = 20000, - [HW_POWER_MISC__FREQSEL__24MHz] = 24000, - [HW_POWER_MISC__FREQSEL__19p2MHz] = 19200, - [HW_POWER_MISC__FREQSEL__14p4MHz] = 14200, - [HW_POWER_MISC__FREQSEL__18MHz] = 18000, - [HW_POWER_MISC__FREQSEL__21p6MHz] = 21600, - [HW_POWER_MISC__FREQSEL__17p28MHz] = 17280, + [BV_POWER_MISC_FREQSEL__RES] = 0, + [BV_POWER_MISC_FREQSEL__20MHz] = 20000, + [BV_POWER_MISC_FREQSEL__24MHz] = 24000, + [BV_POWER_MISC_FREQSEL__19p2MHz] = 19200, + [BV_POWER_MISC_FREQSEL__14p4MHz] = 14200, + [BV_POWER_MISC_FREQSEL__18MHz] = 18000, + [BV_POWER_MISC_FREQSEL__21p6MHz] = 21600, + [BV_POWER_MISC_FREQSEL__17p28MHz] = 17280, }; struct imx233_power_info_t s; memset(&s, 0, sizeof(s)); if(flags & POWER_INFO_DCDC) { - s.dcdc_sel_pllclk = HW_POWER_MISC & HW_POWER_MISC__SEL_PLLCLK; - s.dcdc_freqsel = dcdc_freqsel[__XTRACT(HW_POWER_MISC, FREQSEL)]; + s.dcdc_sel_pllclk = BF_RD(POWER_MISC, SEL_PLLCLK); + s.dcdc_freqsel = dcdc_freqsel[BF_RD(POWER_MISC, FREQSEL)]; } if(flags & POWER_INFO_CHARGE) { + uint32_t current = BF_RD(POWER_CHARGE, BATTCHRG_I); + uint32_t stop_current = BF_RD(POWER_CHARGE, STOP_ILIMIT); for(unsigned i = 0; i < ARRAYLEN(g_charger_current_bits); i++) - if(HW_POWER_CHARGE & g_charger_current_bits[i].bit) + if(current & g_charger_current_bits[i].bit) s.charge_current += g_charger_current_bits[i].current; for(unsigned i = 0; i < ARRAYLEN(g_charger_stop_current_bits); i++) - if(HW_POWER_CHARGE & g_charger_stop_current_bits[i].bit) + if(stop_current & g_charger_stop_current_bits[i].bit) s.stop_current += g_charger_stop_current_bits[i].current; - s.charging = HW_POWER_STS & HW_POWER_STS__CHRGSTS; - s.batt_adj = HW_POWER_BATTMONITOR & HW_POWER_BATTMONITOR__ENBATADJ; + s.charging = BF_RD(POWER_STS, CHRGSTS); + s.batt_adj = BF_RD(POWER_BATTMONITOR, EN_BATADJ); } if(flags & POWER_INFO_4P2) { - s._4p2_enable = HW_POWER_DCDC4P2 & HW_POWER_DCDC4P2__ENABLE_4P2; - s._4p2_dcdc = HW_POWER_DCDC4P2 & HW_POWER_DCDC4P2__ENABLE_DCDC; - s._4p2_cmptrip = __XTRACT(HW_POWER_DCDC4P2, CMPTRIP); - s._4p2_dropout = __XTRACT(HW_POWER_DCDC4P2, DROPOUT_CTRL); + s._4p2_enable = BF_RD(POWER_DCDC4P2, ENABLE_4P2); + s._4p2_dcdc = BF_RD(POWER_DCDC4P2, ENABLE_DCDC); + s._4p2_cmptrip = BF_RD(POWER_DCDC4P2, CMPTRIP); + s._4p2_dropout = BF_RD(POWER_DCDC4P2, DROPOUT_CTRL); } if(flags & POWER_INFO_5V) { - s._5v_pwd_charge_4p2 = HW_POWER_5VCTRL & HW_POWER_5VCTRL__PWD_CHARGE_4P2; - s._5v_dcdc_xfer = HW_POWER_5VCTRL & HW_POWER_5VCTRL__DCDC_XFER; - s._5v_enable_dcdc = HW_POWER_5VCTRL & HW_POWER_5VCTRL__ENABLE_DCDC; + s._5v_pwd_charge_4p2 = BF_RD(POWER_5VCTRL, PWD_CHARGE_4P2); + s._5v_enable_dcdc = BF_RD(POWER_5VCTRL, ENABLE_DCDC); + uint32_t charge_4p2_ilimit = BF_RD(POWER_5VCTRL, CHARGE_4P2_ILIMIT); for(unsigned i = 0; i < ARRAYLEN(g_4p2_charge_limit_bits); i++) - if(HW_POWER_5VCTRL & g_4p2_charge_limit_bits[i].bit) + if(charge_4p2_ilimit & g_4p2_charge_limit_bits[i].bit) s._5v_charge_4p2_limit += g_4p2_charge_limit_bits[i].current; - s._5v_vbusvalid_detect = HW_POWER_5VCTRL & HW_POWER_5VCTRL__VBUSVALID_5VDETECT; - s._5v_vbus_cmps = HW_POWER_5VCTRL & HW_POWER_5VCTRL__PWRUP_VBUS_CMPS; + s._5v_vbusvalid_detect = BF_RD(POWER_5VCTRL, VBUSVALID_5VDETECT); + s._5v_vbus_cmps = BF_RD(POWER_5VCTRL, PWRUP_VBUS_CMPS); s._5v_vbusvalid_thr = - __XTRACT(HW_POWER_5VCTRL, VBUSVALID_TRSH) == 0 ? + BF_RD(POWER_5VCTRL, VBUSVALID_TRSH) == 0 ? 2900 - : 3900 + __XTRACT(HW_POWER_5VCTRL, VBUSVALID_TRSH) * 100; + : 3900 + BF_RD(POWER_5VCTRL, VBUSVALID_TRSH) * 100; } return s; } diff --git a/firmware/target/arm/imx233/power-imx233.h b/firmware/target/arm/imx233/power-imx233.h index 5379326969..e6bd02525b 100644 --- a/firmware/target/arm/imx233/power-imx233.h +++ b/firmware/target/arm/imx233/power-imx233.h @@ -25,157 +25,47 @@ #include "system-target.h" #include "cpu.h" -#define HW_POWER_BASE 0x80044000 - -#define HW_POWER_CTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x0)) -#define HW_POWER_CTRL__ENIRQ_VBUS_VALID (1 << 3) -#define HW_POWER_CTRL__VBUSVALID_IRQ (1 << 4) -#define HW_POWER_CTRL__POLARITY_VBUSVALID (1 << 5) -#define HW_POWER_CTRL__ENIRQ_DC_OK (1 << 14) -#define HW_POWER_CTRL__DC_OK_IRQ (1 << 15) - -#define HW_POWER_5VCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x10)) -#define HW_POWER_5VCTRL__ENABLE_DCDC (1 << 0) -#define HW_POWER_5VCTRL__PWRUP_VBUS_CMPS (1 << 1) -#define HW_POWER_5VCTRL__VBUSVALID_5VDETECT (1 << 4) -#define HW_POWER_5VCTRL__DCDC_XFER (1 << 5) -#define HW_POWER_5VCTRL__VBUSVALID_TRSH_BP 8 -#define HW_POWER_5VCTRL__VBUSVALID_TRSH_BM (0x7 << 8) -#define HW_POWER_5VCTRL__VBUSVALID_TRSH_2p9 (0 << 8) -#define HW_POWER_5VCTRL__VBUSVALID_TRSH_4V (1 << 8) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT_BP 12 -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT_BM (0x3f << 12) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__10mA (1 << 12) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__20mA (1 << 13) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__50mA (1 << 14) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__100mA (1 << 15) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__200mA (1 << 16) -#define HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT__400mA (1 << 17) -#define HW_POWER_5VCTRL__PWD_CHARGE_4P2 (1 << 20) - -#define HW_POWER_MINPWR (*(volatile uint32_t *)(HW_POWER_BASE + 0x20)) -#define HW_POWER_MINPWR__HALF_FETS (1 << 5) -#define HW_POWER_MINPWR__DOUBLE_FETS (1 << 6) - -#define HW_POWER_CHARGE (*(volatile uint32_t *)(HW_POWER_BASE + 0x30)) -#define HW_POWER_CHARGE__BATTCHRG_I_BP 0 -#define HW_POWER_CHARGE__BATTCHRG_I_BM 0x3f -#define HW_POWER_CHARGE__BATTCHRG_I__10mA (1 << 0) -#define HW_POWER_CHARGE__BATTCHRG_I__20mA (1 << 1) -#define HW_POWER_CHARGE__BATTCHRG_I__50mA (1 << 2) -#define HW_POWER_CHARGE__BATTCHRG_I__100mA (1 << 3) -#define HW_POWER_CHARGE__BATTCHRG_I__200mA (1 << 4) -#define HW_POWER_CHARGE__BATTCHRG_I__400mA (1 << 5) -#define HW_POWER_CHARGE__STOP_ILIMIT_BP 8 -#define HW_POWER_CHARGE__STOP_ILIMIT_BM 0xf00 -#define HW_POWER_CHARGE__STOP_ILIMIT__10mA (1 << 8) -#define HW_POWER_CHARGE__STOP_ILIMIT__20mA (1 << 9) -#define HW_POWER_CHARGE__STOP_ILIMIT__50mA (1 << 10) -#define HW_POWER_CHARGE__STOP_ILIMIT__100mA (1 << 11) -#define HW_POWER_CHARGE__PWD_BATTCHRG (1 << 16) -#define HW_POWER_CHARGE__CHRG_STS_OFF (1 << 19) -#define HW_POWER_CHARGE__ENABLE_LOAD (1 << 22) - -#define HW_POWER_VDDDCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x40)) -#define HW_POWER_VDDDCTRL__TRG_BP 0 -#define HW_POWER_VDDDCTRL__TRG_BM 0x1f -#define HW_POWER_VDDDCTRL__BO_OFFSET_BP 8 -#define HW_POWER_VDDDCTRL__BO_OFFSET_BM (0x7 << 8) +#include "regs/regs-power.h" + +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__10mA (1 << 0) +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__20mA (1 << 1) +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__50mA (1 << 2) +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__100mA (1 << 3) +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__200mA (1 << 4) +#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__400mA (1 << 5) + +#define BV_POWER_CHARGE_BATTCHRG_I__10mA (1 << 0) +#define BV_POWER_CHARGE_BATTCHRG_I__20mA (1 << 1) +#define BV_POWER_CHARGE_BATTCHRG_I__50mA (1 << 2) +#define BV_POWER_CHARGE_BATTCHRG_I__100mA (1 << 3) +#define BV_POWER_CHARGE_BATTCHRG_I__200mA (1 << 4) +#define BV_POWER_CHARGE_BATTCHRG_I__400mA (1 << 5) + +#define BV_POWER_CHARGE_STOP_ILIMIT__10mA (1 << 0) +#define BV_POWER_CHARGE_STOP_ILIMIT__20mA (1 << 1) +#define BV_POWER_CHARGE_STOP_ILIMIT__50mA (1 << 2) +#define BV_POWER_CHARGE_STOP_ILIMIT__100mA (1 << 3) + #define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */ #define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */ -#define HW_POWER_VDDDCTRL__LINREG_OFFSET_BP 16 -#define HW_POWER_VDDDCTRL__LINREG_OFFSET_BM (0x3 << 16) -#define HW_POWER_VDDDCTRL__ENABLE_LINREG (1 << 21) - -#define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50)) -#define HW_POWER_VDDACTRL__TRG_BP 0 -#define HW_POWER_VDDACTRL__TRG_BM 0x1f -#define HW_POWER_VDDACTRL__BO_OFFSET_BP 8 -#define HW_POWER_VDDACTRL__BO_OFFSET_BM (0x7 << 8) + #define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */ #define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */ -#define HW_POWER_VDDACTRL__LINREG_OFFSET_BP 12 -#define HW_POWER_VDDACTRL__LINREG_OFFSET_BM (0x3 << 12) -#define HW_POWER_VDDACTRL__ENABLE_LINREG (1 << 17) - -#define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60)) -#define HW_POWER_VDDIOCTRL__TRG_BP 0 -#define HW_POWER_VDDIOCTRL__TRG_BM 0x1f -#define HW_POWER_VDDIOCTRL__BO_OFFSET_BP 8 -#define HW_POWER_VDDIOCTRL__BO_OFFSET_BM (0x7 << 8) + #define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */ #define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */ -#define HW_POWER_VDDIOCTRL__LINREG_OFFSET_BP 12 -#define HW_POWER_VDDIOCTRL__LINREG_OFFSET_BM (0x3 << 12) -#define HW_POWER_VDDMEMCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x70)) -#define HW_POWER_VDDMEMCTRL__TRG_BP 0 -#define HW_POWER_VDDMEMCTRL__TRG_BM 0x1f #define HW_POWER_VDDMEMCTRL__TRG_STEP 50 /* mV */ #define HW_POWER_VDDMEMCTRL__TRG_MIN 1700 /* mV */ -#define HW_POWER_VDDMEMCTRL__ENABLE_LINREG (1 << 8) - -#define HW_POWER_DCDC4P2 (*(volatile uint32_t *)(HW_POWER_BASE + 0x80)) -#define HW_POWER_DCDC4P2__CMPTRIP_BP 0 -#define HW_POWER_DCDC4P2__CMPTRIP_BM 0x1f -#define HW_POWER_DCDC4P2__CMPTRIP__0p85 0 -#define HW_POWER_DCDC4P2__ENABLE_DCDC (1 << 22) -#define HW_POWER_DCDC4P2__ENABLE_4P2 (1 << 23) -#define HW_POWER_DCDC4P2__DROPOUT_CTRL_BP 28 -#define HW_POWER_DCDC4P2__DROPOUT_CTRL_BM (0xf << 28) -#define HW_POWER_DCDC4P2__DROPOUT_CTRL__200mV (3 << 30) -#define HW_POWER_DCDC4P2__DROPOUT_CTRL__HIGHER (2 << 28) - -#define HW_POWER_MISC (*(volatile uint32_t *)(HW_POWER_BASE + 0x90)) -#define HW_POWER_MISC__SEL_PLLCLK 1 -#define HW_POWER_MISC__FREQSEL_BP 4 -#define HW_POWER_MISC__FREQSEL_BM (0x7 << 4) -#define HW_POWER_MISC__FREQSEL__RES 0 -#define HW_POWER_MISC__FREQSEL__20MHz 1 -#define HW_POWER_MISC__FREQSEL__24MHz 2 -#define HW_POWER_MISC__FREQSEL__19p2MHz 3 -#define HW_POWER_MISC__FREQSEL__14p4MHz 4 -#define HW_POWER_MISC__FREQSEL__18MHz 5 -#define HW_POWER_MISC__FREQSEL__21p6MHz 6 -#define HW_POWER_MISC__FREQSEL__17p28MHz 7 - -#define HW_POWER_LOOPCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0xb0)) -#define HW_POWER_LOOPCTRL__DC_C_BP 0 -#define HW_POWER_LOOPCTRL__DC_C_BM 0x3 -#define HW_POWER_LOOPCTRL__DC_R_BP 4 -#define HW_POWER_LOOPCTRL__DC_R_BM 0xf0 -#define HW_POWER_LOOPCTRL__DC_FF_BP 8 -#define HW_POWER_LOOPCTRL__DC_FF_BM (0x7 << 8) -#define HW_POWER_LOOPCTRL__EN_RCSCALE_BP 12 -#define HW_POWER_LOOPCTRL__EN_RCSCALE_BM (0x3 << 12) -#define HW_POWER_LOOPCTRL__EN_RCSCALE__DISABLED 0 -#define HW_POWER_LOOPCTRL__EN_RCSCALE__2X 1 -#define HW_POWER_LOOPCTRL__EN_RCSCALE__4X 2 -#define HW_POWER_LOOPCTRL__EN_RCSCALE__8X 3 -#define HW_POWER_LOOPCTRL__RCSCALE_THRESH (1 << 14) -#define HW_POWER_LOOPCTRL__DF_HYST_THRESH (1 << 15) -#define HW_POWER_LOOPCTRL__CM_HYST_THRESH (1 << 16) -#define HW_POWER_LOOPCTRL__EN_DF_HYST (1 << 17) -#define HW_POWER_LOOPCTRL__EN_CM_HYST (1 << 18) -#define HW_POWER_LOOPCTRL__HYST_SIGN (1 << 19) -#define HW_POWER_LOOPCTRL__TOGGLE_DIF (1 << 20) - -#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0)) -#define HW_POWER_STS__VBUSVALID (1 << 1) -#define HW_POWER_STS__CHRGSTS (1 << 11) -#define HW_POWER_STS__PSWITCH_BP 20 -#define HW_POWER_STS__PSWITCH_BM (3 << 20) -#define HW_POWER_STS__PWRUP_SOURCE_BP 24 -#define HW_POWER_STS__PWRUP_SOURCE_BM (0x3f << 24) - -#define HW_POWER_BATTMONITOR (*(volatile uint32_t *)(HW_POWER_BASE + 0xe0)) -#define HW_POWER_BATTMONITOR__ENBATADJ (1 << 10) -#define HW_POWER_BATTMONITOR__BATT_VAL_BP 16 -#define HW_POWER_BATTMONITOR__BATT_VAL_BM (0x3ff << 16) - -#define HW_POWER_RESET (*(volatile uint32_t *)(HW_POWER_BASE + 0x100)) -#define HW_POWER_RESET__UNLOCK 0x3E770000 -#define HW_POWER_RESET__PWD 0x1 + +#define BV_POWER_MISC_FREQSEL__RES 0 +#define BV_POWER_MISC_FREQSEL__20MHz 1 +#define BV_POWER_MISC_FREQSEL__24MHz 2 +#define BV_POWER_MISC_FREQSEL__19p2MHz 3 +#define BV_POWER_MISC_FREQSEL__14p4MHz 4 +#define BV_POWER_MISC_FREQSEL__18MHz 5 +#define BV_POWER_MISC_FREQSEL__21p6MHz 6 +#define BV_POWER_MISC_FREQSEL__17p28MHz 7 void imx233_power_init(void); @@ -209,13 +99,9 @@ void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg, static inline void imx233_power_set_dcdc_freq(bool pll, unsigned freq) { - HW_POWER_MISC &= ~(HW_POWER_MISC__SEL_PLLCLK | HW_POWER_MISC__FREQSEL_BM); - /* WARNING: HW_POWER_MISC does not have a SET/CLR variant ! */ if(pll) - { - HW_POWER_MISC |= freq << HW_POWER_MISC__FREQSEL_BP; - HW_POWER_MISC |= HW_POWER_MISC__SEL_PLLCLK; - } + BF_WR(POWER_MISC, FREQSEL, freq); + BF_WR(POWER_MISC, SEL_PLLCLK, pll); } struct imx233_power_info_t diff --git a/firmware/target/arm/imx233/powermgmt-imx233.c b/firmware/target/arm/imx233/powermgmt-imx233.c index 31f9ac7659..b155b5fcb8 100644 --- a/firmware/target/arm/imx233/powermgmt-imx233.c +++ b/firmware/target/arm/imx233/powermgmt-imx233.c @@ -41,7 +41,7 @@ static int timeout_4p2_ilimit_increase; /* timeout before increasing 4p2 ilimit int _battery_voltage(void) { /* battery value is in 8mV LSB */ - return __XTRACT(HW_POWER_BATTMONITOR, BATT_VAL) * 8; + return BF_RD(POWER_BATTMONITOR, BATT_VAL) * 8; } void powermgmt_init_target(void) @@ -49,12 +49,12 @@ void powermgmt_init_target(void) imx233_power_set_charge_current(IMX233_CHARGE_CURRENT); imx233_power_set_stop_current(IMX233_STOP_CURRENT); /* assume that adc_init was called and battery monitoring via LRADC setup */ - __REG_SET(HW_POWER_BATTMONITOR) = HW_POWER_BATTMONITOR__ENBATADJ; + BF_WR(POWER_BATTMONITOR, EN_BATADJ, 1); /* make sure we are in a known state: disable charger and 4p2 */ - __REG_SET(HW_POWER_CHARGE) = HW_POWER_CHARGE__PWD_BATTCHRG; - __REG_CLR(HW_POWER_DCDC4P2) = HW_POWER_DCDC4P2__ENABLE_DCDC | - HW_POWER_DCDC4P2__ENABLE_4P2; - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__PWD_CHARGE_4P2; + BF_SET(POWER_CHARGE, PWD_BATTCHRG); + BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0); + BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0); + BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2); charge_state = DISCHARGING; } @@ -68,10 +68,10 @@ void charging_algorithm_step(void) logf("pwrmgmt: * -> discharging"); logf("pwrmgmt: disable charger and 4p2"); /* 5V has been lost: disable 4p2 power rail */ - __REG_SET(HW_POWER_CHARGE) = HW_POWER_CHARGE__PWD_BATTCHRG; - __REG_CLR(HW_POWER_DCDC4P2) = HW_POWER_DCDC4P2__ENABLE_DCDC | - HW_POWER_DCDC4P2__ENABLE_4P2; - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__PWD_CHARGE_4P2; + BF_SET(POWER_CHARGE, PWD_BATTCHRG); + BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0); + BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0); + BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2); charge_state = DISCHARGING; } /* battery -> 5v transition */ @@ -80,11 +80,11 @@ void charging_algorithm_step(void) logf("pwrmgmt: discharging -> trickle"); logf("pwrmgmt: begin charging 4p2"); /* 5V has been detected: prepare 4.2V power rail for activation */ - __REG_SET(HW_POWER_DCDC4P2) = HW_POWER_DCDC4P2__ENABLE_4P2; - __REG_SET(HW_POWER_CHARGE) = HW_POWER_CHARGE__ENABLE_LOAD; - __FIELD_SET(HW_POWER_5VCTRL, CHARGE_4P2_ILIMIT, 1); - __REG_CLR(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__PWD_CHARGE_4P2;// FIXME: manual error ? - __REG_SET(HW_POWER_DCDC4P2) = HW_POWER_DCDC4P2__ENABLE_DCDC; + BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1); + BF_SET(POWER_CHARGE, ENABLE_LOAD); + BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 1); + BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);// FIXME: manual error ? + BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 1); timeout_4p2_ilimit_increase = current_tick + HZ / 100; charge_state = TRICKLE; } @@ -92,10 +92,10 @@ void charging_algorithm_step(void) { /* if 4.2V current limit has not reached 780mA, increase it slowly to * charge the 4.2V capacitance */ - if(__XTRACT(HW_POWER_5VCTRL, CHARGE_4P2_ILIMIT) != 0x3f) + if(BF_RD(POWER_5VCTRL, CHARGE_4P2_ILIMIT) != 0x3f) { //logf("pwrmgmt: incr 4.2 ilimit"); - HW_POWER_5VCTRL += 1 << HW_POWER_5VCTRL__CHARGE_4P2_ILIMIT_BP; + HW_POWER_5VCTRL += BF_POWER_5VCTRL_CHARGE_4P2_ILIMIT(1); timeout_4p2_ilimit_increase = current_tick + HZ / 100; } /* we've reached the maximum, take action */ @@ -104,12 +104,12 @@ void charging_algorithm_step(void) logf("pwrmgmt: enable dcdc and charger"); logf("pwrmgmt: trickle -> charging"); /* adjust arbitration between 4.2 and battery */ - __FIELD_SET(HW_POWER_DCDC4P2, CMPTRIP, 0); /* 85% */ - __FIELD_SET(HW_POWER_DCDC4P2, DROPOUT_CTRL, 0xe); /* select greater, 200 mV drop */ - __REG_CLR(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__DCDC_XFER; - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__ENABLE_DCDC; + BF_WR(POWER_DCDC4P2, CMPTRIP, 0); /* 85% */ + BF_WR(POWER_DCDC4P2, DROPOUT_CTRL, 0xe); /* select greater, 200 mV drop */ + BF_CLR(POWER_5VCTRL, DCDC_XFER); + BF_SET(POWER_5VCTRL, ENABLE_DCDC); /* enable battery charging */ - __REG_CLR(HW_POWER_CHARGE) = HW_POWER_CHARGE__PWD_BATTCHRG; + BF_CLR(POWER_CHARGE, PWD_BATTCHRG); charge_state = CHARGING; timeout_charging = current_tick + IMX233_CHARGING_TIMEOUT; } @@ -120,11 +120,11 @@ void charging_algorithm_step(void) logf("pwrmgmt: charging timeout exceeded!"); logf("pwrmgmt: charging -> error"); /* stop charging */ - __REG_SET(HW_POWER_5VCTRL) = HW_POWER_5VCTRL__PWD_CHARGE_4P2; + BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2); /* goto error state */ charge_state = CHARGE_STATE_ERROR; } - else if(charge_state == CHARGING && !(HW_POWER_STS & HW_POWER_STS__CHRGSTS)) + else if(charge_state == CHARGING && !BF_RD(POWER_STS, CHRGSTS)) { logf("pwrmgmt: topping off"); logf("pwrmgmt: charging -> topoff"); @@ -136,7 +136,7 @@ void charging_algorithm_step(void) logf("pwrmgmt: charging finished"); logf("pwrmgmt: topoff -> disabled"); /* stop charging */ - __REG_SET(HW_POWER_CHARGE) = HW_POWER_CHARGE__PWD_BATTCHRG; + BF_SET(POWER_CHARGE, PWD_BATTCHRG); charge_state = CHARGE_STATE_DISABLED; } } diff --git a/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c index 86bb00f4a5..703e87fc42 100644 --- a/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c +++ b/firmware/target/arm/imx233/sansa-fuzeplus/button-fuzeplus.c @@ -369,7 +369,7 @@ int button_read_device(void) static int volume_power_lock = 0; if(volume_power_lock > 0) volume_power_lock--; - switch(__XTRACT(HW_POWER_STS, PSWITCH)) + switch(BF_RD(POWER_STS, PSWITCH)) { case 1: if(volume_power_lock == 0) diff --git a/firmware/target/arm/imx233/usb-imx233.c b/firmware/target/arm/imx233/usb-imx233.c index d27f3ee55c..4e7656f7ab 100644 --- a/firmware/target/arm/imx233/usb-imx233.c +++ b/firmware/target/arm/imx233/usb-imx233.c @@ -61,7 +61,7 @@ void usb_init_device(void) int usb_detect(void) { - return (HW_POWER_STS & HW_POWER_STS__VBUSVALID) ? USB_INSERTED : USB_EXTRACTED; + return BF_RD(POWER_STS, VBUSVALID) ? USB_INSERTED : USB_EXTRACTED; } void usb_enable(bool on) -- cgit v1.2.3