From fd715fa95cc6bdd57f558cdbfc43bc768ec9645b Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Fri, 18 Jun 2010 17:33:51 +0000 Subject: as3525*: enable MMU in bootloader Reserve 1MB of DRAM for loading rockbox and use the rest as BSS Write sdram setup in assembler and move it to a separate file, together with MMU init code git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26926 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/crt0.S | 83 ++++++++-------------------------------------- 1 file changed, 14 insertions(+), 69 deletions(-) (limited to 'firmware/target/arm/crt0.S') diff --git a/firmware/target/arm/crt0.S b/firmware/target/arm/crt0.S index 6def9a1a88..f52056617a 100644 --- a/firmware/target/arm/crt0.S +++ b/firmware/target/arm/crt0.S @@ -26,23 +26,14 @@ .global start start: /* Exception vectors */ - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - ldr pc, [pc, #24] - -.word newstart -.word undef_instr_handler -.word software_int_handler -.word prefetch_abort_handler -.word data_abort_handler -.word reserved_handler -.word irq_handler -.word fiq_handler + b newstart + b undef_instr_handler + b software_int_handler + b prefetch_abort_handler + b data_abort_handler + b reserved_handler + b irq_handler + b fiq_handler _vectorsend: @@ -51,56 +42,11 @@ _vectorsend: newstart: msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ -#if (CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2) && !defined(BOOTLOADER) - -#define CACHE_NONE 0 -#define CACHE_ALL 0x0C -#define UNCACHED_ADDR(a) (a + 0x10000000) - - /* Setup MMU : has to be done before accessing IRAM ! */ - - bl ttb_init - - mov r0, #0 @ physical address - mov r1, #0 @ virtual address - mov r2, #0x1000 @ size (all memory) - mov r3, #CACHE_NONE - bl map_section - - mov r0, #0 @ physical address - ldr r1, =IRAM_ORIG @ virtual address - mov r2, #1 @ size : 1MB - mov r3, #CACHE_ALL - bl map_section - - mov r0, #0 @ physical address - ldr r1, =UNCACHED_ADDR(IRAM_ORIG) @ virtual address - mov r2, #1 @ size : 1MB - mov r3, #CACHE_NONE - bl map_section - - mov r0, #0x30000000 @ physical address - mov r1, #DRAM_ORIG @ virtual address - mov r2, #MEMORYSIZE @ size - mov r3, #CACHE_ALL - bl map_section - - mov r0, #0x30000000 @ physical address - mov r1, #UNCACHED_ADDR(DRAM_ORIG) @ virtual address - mov r2, #MEMORYSIZE @ size - mov r3, #CACHE_NONE - bl map_section - - /* map 1st mbyte of DRAM at 0x0 to have exception vectors available */ - - mov r0, #0x30000000 @ physical address - mov r1, #0 @ virtual address - mov r2, #1 @ size - mov r3, #CACHE_ALL - bl map_section - - bl enable_mmu +#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2 + bl memory_init +#endif +#ifdef USE_IRAM /* Zero out IBSS */ ldr r2, =_iedata ldr r3, =_iend @@ -120,7 +66,6 @@ newstart: ldrhi r5, [r2], #4 strhi r5, [r3], #4 bhi 1b - #endif #ifdef HAVE_INIT_ATTR @@ -173,8 +118,8 @@ newstart: /* Switch back to supervisor mode */ msr cpsr_c, #0xd3 - bl main - + ldr ip, =main @ make sure we are using the virtual address + bx ip /* All illegal exceptions call into UIE with exception address as first * parameter. This is calculated differently depending on which exception -- cgit v1.2.3