From fe23dc8f15e9d01ea634d10b334984f1d8760007 Mon Sep 17 00:00:00 2001 From: Jens Arnold Date: Mon, 2 Jul 2007 05:16:40 +0000 Subject: Improved CPU clock setup for PP502x. PP5020 and PP5022 are not register compatible here, so define the PP5022 targets properly, and introduce a CPU_PP502x macro for easier family check. Improves stability on PP5020 (less freezing, tested with Mini G1) and reduces clock change penalty (500us on PP5020; uses the relock bit on PP5022). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13763 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/ata-target.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'firmware/target/arm/ata-target.h') diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h index d6c5f512e6..d65a7b2822 100644 --- a/firmware/target/arm/ata-target.h +++ b/firmware/target/arm/ata-target.h @@ -17,7 +17,7 @@ * ****************************************************************************/ -#if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) +#ifdef CPU_PP #if (CONFIG_CPU == PP5002) @@ -26,7 +26,7 @@ #define ATA_IOBASE 0xc00031e0 #define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8))) -#elif (CONFIG_CPU == PP5020) +#elif defined CPU_PP502x /* asm optimized reading and writing */ #define ATA_OPTIMIZED_READING -- cgit v1.2.3