From 1d1e8e4eb723f34e50aaf3ffcff348367817bc52 Mon Sep 17 00:00:00 2001 From: Bertrik Sikken Date: Sun, 18 Sep 2011 15:33:19 +0000 Subject: Sansa AMSv2: initialise PMU (power management unit), inspired by how the OF does it Differences in PMU settings: - explicitly disable the PLL inside the PMU (we don't use it) - don't increase the PVDD1/AVDD17 voltages because the impact on runtime is still unclear git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30571 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/as3525/system-as3525.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'firmware/target/arm/as3525/system-as3525.c') diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 8f64597f4f..58f08a7d19 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -270,6 +270,23 @@ void system_init(void) dma_init(); ascodec_init(); + +#if (CONFIG_CPU == AS3525v2) + /* PLL: disable audio PLL, we use MCLK already */ + ascodec_write_pmu(0x1A, 7, 0x02); + /* DCDC_Cntr: set switching speed of CVDD1/2 power supplies to 1 MHz */ + ascodec_write_pmu(0x17, 7, 0x30); + /* Out_Cntr2: set drive strength of 24 MHz and 32 kHz clocks to 1 mA */ + ascodec_write_pmu(0x1A, 2, 0xCC); + /* CHGVBUS2: set VBUS threshold to 3.18V and EOC threshold to 30% CC */ + ascodec_write_pmu(0x19, 2, 0x41); +#if 0 /* don't set higher voltage until impact on runtime has been checked */ + /* PVDD1: set PVDD1 power supply to 2.5 V */ + ascodec_write_pmu(0x18, 1, 0x35); + /* AVDD17: set AVDD17 power supply to 2.5V */ + ascodec_write_pmu(0x18, 7, 0x31); +#endif +#endif /* (CONFIG_CPU == AS3525v2) */ #ifndef BOOTLOADER /* setup isr for microsd monitoring and for fuzev2 scrollwheel irq */ -- cgit v1.2.3