From 0b6d65b09e7c12d7c0469e942518d913f7fd9376 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Sun, 30 Nov 2008 16:36:32 +0000 Subject: Sansa AMS: Use a valid PLL setting (248MHz aka maximum fclk) Fix lcd drivers which stopped working after changing the PLL. Move set_cpu_frequency() to a place where it is actually used. Remove enable_irq() call already done by the bootloader git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19276 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/as3525/system-as3525.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'firmware/target/arm/as3525/system-as3525.c') diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 24149948b8..0451cb36d2 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -215,15 +215,10 @@ void system_init(void) "mcr p15, 0, r0, c1, c0 \n" : : : "r0" ); - CGU_PLLA = 0x4330; /* PLLA 384 MHz */ + CGU_PLLA = 0x261F; /* PLLA 248 MHz */ while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ - CGU_PROC = (3<<2)|0x01; /* fclk = PLLA*5/8 = 240 MHz */ -#ifndef BOOTLOADER -#ifdef HAVE_ADJUSTABLE_CPU_FREQ - set_cpu_frequency(CPUFREQ_DEFAULT); -#endif -#endif + CGU_PROC = 1; /* fclk = PLLA = 248 MHz */ asm volatile( "mov r0, #0 \n" @@ -243,16 +238,17 @@ void system_init(void) VIC_INT_ENABLE = 0; /* disable all interrupt lines */ CGU_PERI |= CGU_VIC_CLOCK_ENABLE; VIC_INT_SELECT = 0; /* only IRQ, no FIQ */ - - enable_irq(); #else /* Disable fast hardware power-off, to use power button normally * We don't need the power button in the bootloader. */ ascodec_init(); ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) & (1<<2)); - #endif /* BOOTLOADER */ +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + set_cpu_frequency(CPUFREQ_DEFAULT); +#endif + dma_init(); } -- cgit v1.2.3