From 45711ac2869f955c40be96d8dcbc7201c718dba4 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Thu, 4 Dec 2008 20:04:31 +0000 Subject: Sansa AMS: centralize clock settings in clock-target.h Reorder system_init() to initialize peripherals not only in bootloader Use a 65MHz PCLK (and memclk) which will be needed for realtime decoding git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19330 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'firmware/target/arm/as3525/sansa-fuze') diff --git a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c b/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c index cc61a82c6f..76b74b7c3e 100644 --- a/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c +++ b/firmware/target/arm/as3525/sansa-fuze/lcd-fuze.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "lcd.h" +#include "clock-target.h" /* The controller is unknown, but some registers appear to be the same as the HD66789R */ @@ -49,7 +50,8 @@ static void lcd_delay(int x) static void as3525_dbop_init(void) { - CGU_DBOP = (1<<3); + CGU_DBOP = (1<<3) | CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ); + DBOP_TIMPOL_01 = 0xe167e167; DBOP_TIMPOL_23 = 0xe167006e; DBOP_CTRL = 0x41008; -- cgit v1.2.3