From b714ace1634cd6da7f21fca10ac2e8981da7fc88 Mon Sep 17 00:00:00 2001 From: Jack Halpin Date: Fri, 29 May 2009 06:43:37 +0000 Subject: AMSSansa: clock-target.h and debug-as3525 now use AS3525_FCLK_PREDIV correctly. Default frequency scheme remains 248/62/62. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21125 a1c6a512-1295-4272-9138-f99709370657 --- firmware/target/arm/as3525/debug-as3525.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'firmware/target/arm/as3525/debug-as3525.c') diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c index 8bd2ee1188..7585f76431 100644 --- a/firmware/target/arm/as3525/debug-as3525.c +++ b/firmware/target/arm/as3525/debug-as3525.c @@ -84,6 +84,8 @@ static unsigned read_cp15 (void) int calc_freq(int clk) { int out_div; + unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3; + unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf; switch(clk) { /* clk_main = clk_int = 24MHz oscillator */ @@ -119,14 +121,11 @@ int calc_freq(int clk) case CLK_FCLK: switch(CGU_PROC & 3) { case 0: - return CLK_MAIN/ - ((8/(8-((CGU_PROC>>2)& 0x3)))*(((CGU_PROC>>4)& 0xf) + 1)); + return (CLK_MAIN * (8 - prediv)) / (8*(postdiv + 1)); case 1: - return calc_freq(CLK_PLLA)/ - ((8/(8-((CGU_PROC>>2)& 0x3)))*(((CGU_PROC>>4)& 0xf) + 1)); + return (calc_freq(CLK_PLLA) * (8 - prediv)) / (8*(postdiv + 1)); case 2: - return calc_freq(CLK_PLLB)/ - ((8/(8-((CGU_PROC>>2)& 0x3)))*(((CGU_PROC>>4)& 0xf) + 1)); + return (calc_freq(CLK_PLLB) * (8 - prediv)) / (8*(postdiv + 1)); default: return 0; } -- cgit v1.2.3