From fe23dc8f15e9d01ea634d10b334984f1d8760007 Mon Sep 17 00:00:00 2001 From: Jens Arnold Date: Mon, 2 Jul 2007 05:16:40 +0000 Subject: Improved CPU clock setup for PP502x. PP5020 and PP5022 are not register compatible here, so define the PP5022 targets properly, and introduce a CPU_PP502x macro for easier family check. Improves stability on PP5020 (less freezing, tested with Mini G1) and reduces clock change penalty (500us on PP5020; uses the relock bit on PP5022). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13763 a1c6a512-1295-4272-9138-f99709370657 --- firmware/rolo.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'firmware/rolo.c') diff --git a/firmware/rolo.c b/firmware/rolo.c index 0b8a4f28ba..1ad59e216b 100644 --- a/firmware/rolo.c +++ b/firmware/rolo.c @@ -105,7 +105,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, { long i; unsigned char* localdest = dest; -#if (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024) +#ifdef CPU_PP502x unsigned long* memmapregs = (unsigned long*)0xf000f000; #endif @@ -120,7 +120,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, "jmp (%0) \n" : : "a"(dest) ); -#elif (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024) +#elif defined(CPU_PP502x) /* Tell the COP that we've finished loading and started rebooting */ cpu_message = 0; -- cgit v1.2.3