From f5041538574c039b07c4db8d261bd33ec0f3bab0 Mon Sep 17 00:00:00 2001 From: Rafaël Carré Date: Mon, 8 Jun 2009 23:05:33 +0000 Subject: FS#10048 : enable MMU and data cache on Sansa AMS to give a major speed up - cache IRAM and DRAM - map IRAM just next to DRAM to remove the need for -mlong-calls and reduce binsize - tweak delays in Fuze button code - tweak delays in Clip button code (down button sometimes doesn't respond anyway : an alternate driver is being worked on) Before reporting any problem, please check your filesystem or format your player from the OF git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21228 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/as3525.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'firmware/export') diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h index 21bf2bdc48..31bbeedc1e 100644 --- a/firmware/export/as3525.h +++ b/firmware/export/as3525.h @@ -27,9 +27,11 @@ /* we put the codec buffer in IRAM */ #define AMS_LOWMEM #endif -/* these addresses are valid after mapping through the MMU */ + +/* Virtual addresses */ +/* Do not apply to the bootloader, which uses physical addresses (no MMU) */ #define DRAM_ORIG 0x30000000 -#define IRAM_ORIG 0x0 +#define IRAM_ORIG (DRAM_ORIG + DRAM_SIZE) /* IRAM is mapped just next to DRAM */ #define DRAM_SIZE (MEMORYSIZE * 0x100000) #define IRAM_SIZE 0x50000 @@ -40,8 +42,7 @@ #define ECCBYTES 3 /* AS352X MMU Page Table Entries */ -/* to be implemented */ -#define TTB_SIZE 0x0 +#define TTB_SIZE 0x4000 #define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) @@ -493,4 +494,7 @@ interface */ #define I2SOUT_CLEAR (*(volatile unsigned char*)(I2SOUT_BASE+0x10)) #define I2SOUT_DATA (volatile unsigned long*)(I2SOUT_BASE+0x14) +/* PCM addresses for obtaining buffers will be what DMA is using (physical) */ +#define HAVE_PCM_DMA_ADDRESS + #endif /*__AS3525_H__*/ -- cgit v1.2.3