From f29cae0d26e21e35f71845b6726aca3b81aa6a77 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Mon, 30 Oct 2006 14:17:14 +0000 Subject: Moved coldfire code in system.c and system.h into target tree. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11399 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/system.h | 119 ++++------------------------------------------- 1 file changed, 8 insertions(+), 111 deletions(-) (limited to 'firmware/export') diff --git a/firmware/export/system.h b/firmware/export/system.h index ce0c795fbd..4a33d80466 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h @@ -153,6 +153,11 @@ enum { MAXMEMGUARD }; +#ifndef SIMULATOR +#ifdef CPU_COLDFIRE +#include "system-target.h" +#endif +#endif #if CONFIG_CPU == SH7034 #define or_b(mask, address) \ @@ -176,46 +181,7 @@ enum { : /* %0 */ I_CONSTRAINT((char)(mask)), \ /* %1 */ "z"(address-GBR)) -#elif defined(CPU_COLDFIRE) -#define or_l(mask, address) \ - asm \ - ("or.l %0,(%1)" \ - : \ - : /* %0 */ "d"(mask), \ - /* %1 */ "a"(address)) - -#define and_l(mask, address) \ - asm \ - ("and.l %0,(%1)" \ - : \ - : /* %0 */ "d"(mask), \ - /* %1 */ "a"(address)) - -#define eor_l(mask, address) \ - asm \ - ("eor.l %0,(%1)" \ - : \ - : /* %0 */ "d"(mask), \ - /* %1 */ "a"(address)) - -#define EMAC_ROUND 0x10 -#define EMAC_FRACTIONAL 0x20 -#define EMAC_SATURATE 0x80 - -static inline void coldfire_set_macsr(unsigned long flags) -{ - asm volatile ("move.l %0, %%macsr" : : "i,r" (flags)); -} - -static inline unsigned long coldfire_get_macsr(void) -{ - unsigned long m; - - asm volatile ("move.l %%macsr, %0" : "=r" (m)); - return m; -} - -#endif +#endif /* CONFIG_CPU == SH7034 */ #ifndef SIMULATOR @@ -272,75 +238,6 @@ static inline unsigned long swap32(unsigned long value) #define invalidate_icache() -#elif defined(CPU_COLDFIRE) -#define HIGHEST_IRQ_LEVEL (7<<8) -static inline int set_irq_level(int level) -{ - int oldlevel; - /* Read the old level and set the new one */ - asm volatile ("move.w %%sr,%0\n" - "or.l #0x2000,%1\n" - "move.w %1,%%sr\n" : "=d" (oldlevel), "+d" (level) : ); - return oldlevel; -} - -static inline unsigned short swap16(unsigned short value) - /* - result[15..8] = value[ 7..0]; - result[ 7..0] = value[15..8]; - */ -{ - return (value >> 8) | (value << 8); -} - -static inline unsigned long SWAW32(unsigned long value) - /* - result[31..16] = value[15.. 0]; - result[15.. 0] = value[31..16]; - */ -{ - asm ("swap %%0" : "+r"(value)); - return value; -} - -static inline unsigned long swap32(unsigned long value) - /* - result[31..24] = value[ 7.. 0]; - result[23..16] = value[15.. 8]; - result[15.. 8] = value[23..16]; - result[ 7.. 0] = value[31..24]; - */ -{ - unsigned long mask = 0x00FF00FF; - asm ( /* val = ABCD */ - "and.l %[val],%[mask] \n" /* mask = .B.D */ - "eor.l %[mask],%[val] \n" /* val = A.C. */ - "lsl.l #8,%[mask] \n" /* mask = B.D. */ - "lsr.l #8,%[val] \n" /* val = .A.C */ - "or.l %[mask],%[val] \n" /* val = BADC */ - "swap %[val] \n" /* val = DCBA */ - : /* outputs */ - [val] "+d"(value), - [mask]"+d"(mask) - ); - return value; -} - -static inline void invalidate_icache(void) -{ - asm volatile ("move.l #0x01000000,%d0\n" - "movec.l %d0,%cacr\n" - "move.l #0x80000000,%d0\n" - "movec.l %d0,%cacr"); -} - -#define CPUFREQ_DEFAULT_MULT 1 -#define CPUFREQ_DEFAULT (CPUFREQ_DEFAULT_MULT * CPU_FREQ) -#define CPUFREQ_NORMAL_MULT 4 -#define CPUFREQ_NORMAL (CPUFREQ_NORMAL_MULT * CPU_FREQ) -#define CPUFREQ_MAX_MULT 11 -#define CPUFREQ_MAX (CPUFREQ_MAX_MULT * CPU_FREQ) - #elif defined(CPU_ARM) /* TODO: Implement set_irq_level and check CPU frequencies */ @@ -444,8 +341,8 @@ static inline int set_irq_level(int level) { int result; __asm__ ("ld %0, 0\n\t" - "tstsr ie\n\t" - "incc %0" : "=r"(result)); + "tstsr ie\n\t" + "incc %0" : "=r"(result)); if (level > 0) __asm__ volatile ("clrsr ie"); else -- cgit v1.2.3