From d462a64a918117991e11dade2d7fa3a28196e07a Mon Sep 17 00:00:00 2001 From: Dave Chapman Date: Sat, 6 Sep 2008 17:50:59 +0000 Subject: Initial commit of iaudio 7 port by Vitja Makarov (FS#9245). Port is at quite an advanced stage, but is troubled by the lack of a reliable NAND driver (similar to the Cowon D2 port) and is not yet suitable for non-developers. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18435 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/config-iaudio7.h | 163 +++++++++++++++++++++++++++++++++++++++ firmware/export/config.h | 1 - firmware/export/hd66789r.h | 68 ++++++++++++++++ firmware/export/tcc77x.h | 102 +++++++++++++++++++++++- firmware/export/usb-tcc7xx.h | 104 +++++++++++++++++++++++++ 5 files changed, 435 insertions(+), 3 deletions(-) create mode 100644 firmware/export/config-iaudio7.h create mode 100644 firmware/export/hd66789r.h create mode 100644 firmware/export/usb-tcc7xx.h (limited to 'firmware/export') diff --git a/firmware/export/config-iaudio7.h b/firmware/export/config-iaudio7.h new file mode 100644 index 0000000000..8bc73fa41c --- /dev/null +++ b/firmware/export/config-iaudio7.h @@ -0,0 +1,163 @@ +/* + * This config file is for the Iaudio7 series + */ +#define TARGET_TREE /* this target is using the target tree system */ + +/* For Rolo and boot loader */ +#define MODEL_NUMBER 32 + +/* define this if you have recording possibility */ +#define HAVE_RECORDING + +/* Define bitmask of input sources - recordable bitmask can be defined + explicitly if different */ +#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_FMRADIO) + +/* define hardware samples rate caps mask */ +#define HW_SAMPR_CAPS (/*SAMPR_CAP_88 | */SAMPR_CAP_44/* | SAMPR_CAP_22 | SAMPR_CAP_11*/) + +/* define the bitmask of recording sample rates */ +#define REC_SAMPR_CAPS (SAMPR_CAP_44/* | SAMPR_CAP_22 | SAMPR_CAP_11*/) + +/* define this if you have a bitmap LCD display */ +#define HAVE_LCD_BITMAP + +/* define this if you have a colour LCD */ +#define HAVE_LCD_COLOR + +/* define this if you can flip your LCD */ +//#define HAVE_LCD_FLIP + +/* define this if you can invert the colours on your LCD */ +//#define HAVE_LCD_INVERT + +/* define this if you have access to the quickscreen */ +#define HAVE_QUICKSCREEN + +/* define this if you have access to the pitchscreen */ +#define HAVE_PITCHSCREEN + +/* define this if you have LCD enable function */ +#define HAVE_LCD_ENABLE + +/* define this if you would like tagcache to build on this target */ +#define HAVE_TAGCACHE + +#define HAVE_FAT16SUPPORT + +#if 0 /* Enable for USB driver test */ +#define HAVE_USBSTACK +#define USE_HIGH_SPEED +#define USB_VENDOR_ID 0x0e21 +#define USB_PRODUCT_ID 0x0750 + +#define USB_STORAGE +#define USB_SERIAL +#endif + +/* define this if you have a flash memory storage */ +#define HAVE_FLASH_STORAGE + +/* LCD dimensions */ +#define LCD_WIDTH 160 +#define LCD_HEIGHT 128 +/* 16bits for now... */ +#define LCD_DEPTH 16 /* 262144 colours */ +#define LCD_PIXELFORMAT RGB565 /*rgb565*/ + +/*#define LCD_PIXELFORMAT VERTICAL_PACKING*/ + +/* define this to indicate your device's keypad */ +#define CONFIG_KEYPAD IAUDIO67_PAD + +/* #define HAVE_BUTTON_DATA */ + +/* define this if you have a real-time clock */ +#define CONFIG_RTC RTC_PCF50606 + +/* define this if you have RTC RAM available for settings */ +//#define HAVE_RTC_RAM + +/* Define this if you have a software controlled poweroff */ +#define HAVE_SW_POWEROFF + +/* Reduce Tremor's ICODE usage */ +#define ICODE_ATTR_TREMOR_NOT_MDCT + +/* The number of bytes reserved for loadable codecs */ +#define CODEC_SIZE 0x80000 + +/* The number of bytes reserved for loadable plugins */ +#define PLUGIN_BUFFER_SIZE 0x80000 + +#define AB_REPEAT_ENABLE 1 + +/* Define this if you do software codec */ +#define CONFIG_CODEC SWCODEC + +/* The iaudio7 uses built-in WM8731 codec */ +#define HAVE_WM8731 +/* Codec is slave on serial bus */ +#define CODEC_SLAVE + +/* Define this if you have the TLV320 audio codec */ +//#define HAVE_TLV320 + +/* TLV320 has no tone controls, so we use the software ones */ +//#define HAVE_SW_TONE_CONTROLS + +/* Define this for LCD backlight available */ +#define HAVE_BACKLIGHT + +#define CONFIG_I2C I2C_TCC77X + +#define BATTERY_CAPACITY_DEFAULT 540 /* default battery capacity */ +#define BATTERY_CAPACITY_MIN 540 /* min. capacity selectable */ +#define BATTERY_CAPACITY_MAX 540 /* max. capacity selectable */ +#define BATTERY_CAPACITY_INC 50 /* capacity increment */ +#define BATTERY_TYPES_COUNT 1 /* only one type */ + +/* define this if the unit should not shut down on low battery. */ +#define NO_LOW_BATTERY_SHUTDOWN +#define CONFIG_CHARGING CHARGING_SIMPLE + +#ifndef SIMULATOR + +/* Define this if you have a TCC770 */ +#define CONFIG_CPU TCC770 + +/* Define this if you have ATA power-off control */ +#define HAVE_ATA_POWER_OFF + +/* Define this to the CPU frequency */ +#define CPU_FREQ 120000000 + +/* Offset ( in the firmware file's header ) to the file length */ +//#define FIRMWARE_OFFSET_FILE_LENGTH 0 + +/* Offset ( in the firmware file's header ) to the file CRC */ +#define FIRMWARE_OFFSET_FILE_CRC 0 + +/* Offset ( in the firmware file's header ) to the real data */ +#define FIRMWARE_OFFSET_FILE_DATA 8 + +/* Software controlled LED */ +#define CONFIG_LED LED_VIRTUAL + +#define CONFIG_LCD LCD_IAUDIO67 + +/* FM Tuner */ +#define CONFIG_TUNER LV24020LP +#define HAVE_TUNER_PWR_CTRL + +/* Define this for FM radio input available */ +#define HAVE_FMRADIO_IN + +#define BOOTFILE_EXT "iaudio" +#define BOOTFILE "rockbox." BOOTFILE_EXT +#define BOOTDIR "/" + +#ifdef BOOTLOADER +#define TCCBOOT +#endif +#endif /* SIMULATOR */ diff --git a/firmware/export/config.h b/firmware/export/config.h index bdf8743942..fe2cff0ea6 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -481,7 +481,6 @@ (((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \ defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ - defined(CPU_TCC77X) || /* Telechips: core, plugins, codecs */ \ (CONFIG_CPU == PNX0101) || \ (CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */ #define ICODE_ATTR __attribute__ ((section(".icode"))) diff --git a/firmware/export/hd66789r.h b/firmware/export/hd66789r.h new file mode 100644 index 0000000000..464ddbab4f --- /dev/null +++ b/firmware/export/hd66789r.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2008 Vitja Makarov + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#ifndef _HD66789R_H_ +#define _HD66789R_H_ + +/* HD66789R registers */ +#define R_START_OSC 0x00 +#define R_DRV_OUTPUT_CONTROL 0x01 +#define R_DRV_WAVEFORM_CONTROL 0x02 +#define R_ENTRY_MODE 0x03 +#define R_COMPARE_REG1 0x04 +#define R_COMPARE_REG2 0x05 + +#define R_DISP_CONTROL1 0x07 +#define R_DISP_CONTROL2 0x08 +#define R_DISP_CONTROL3 0x09 + +#define R_FRAME_CYCLE_CONTROL 0x0b +#define R_EXT_DISP_IF_CONTROL 0x0c + +#define R_POWER_CONTROL1 0x10 +#define R_POWER_CONTROL2 0x11 +#define R_POWER_CONTROL3 0x12 +#define R_POWER_CONTROL4 0x13 + +#define R_RAM_ADDR_SET 0x21 +#define R_WRITE_DATA_2_GRAM 0x22 + +#define R_GAMMA_FINE_ADJ_POS1 0x30 +#define R_GAMMA_FINE_ADJ_POS2 0x31 +#define R_GAMMA_FINE_ADJ_POS3 0x32 +#define R_GAMMA_GRAD_ADJ_POS 0x33 + +#define R_GAMMA_FINE_ADJ_NEG1 0x34 +#define R_GAMMA_FINE_ADJ_NEG2 0x35 +#define R_GAMMA_FINE_ADJ_NEG3 0x36 +#define R_GAMMA_GRAD_ADJ_NEG 0x37 + +#define R_GAMMA_AMP_ADJ_RES_POS 0x38 +#define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39 + +#define R_GATE_SCAN_POS 0x40 +#define R_VERT_SCROLL_CONTROL 0x41 +#define R_1ST_SCR_DRV_POS 0x42 +#define R_2ND_SCR_DRV_POS 0x43 +#define R_HORIZ_RAM_ADDR_POS 0x44 +#define R_VERT_RAM_ADDR_POS 0x45 + +#endif /* _HD66789R_H_ */ diff --git a/firmware/export/tcc77x.h b/firmware/export/tcc77x.h index b17865e257..9ff8adea3e 100644 --- a/firmware/export/tcc77x.h +++ b/firmware/export/tcc77x.h @@ -59,8 +59,13 @@ #define PCLKCFG5 (*(volatile unsigned long *)0x80000430) #define PCLKCFG6 (*(volatile unsigned long *)0x80000434) +#define PCLK_DAI PCLKCFG6 + /* Device bits for SWRESET & BCLKCTR */ +#define DEV_DAI (1<<0) +#define DEV_USBD (1<<4) +#define DEV_ECC (1<<9) #define DEV_NAND (1<<16) /* ADC */ @@ -86,9 +91,23 @@ /* IRQ Controller */ +#define EXT0_IRQ_MASK (1<<0) +#define EXT1_IRQ_MASK (1<<1) +#define EXT2_IRQ_MASK (1<<2) +#define EXT3_IRQ_MASK (1<<3) +#define I2SR_IRQ_MASK (1<<4) +#define I2ST_IRQ_MASK (1<<5) +#define TIMER0_IRQ_MASK (1<<6) +#define USBD_IRQ_MASK (1<<8) /* USB 2.0 device */ +#define USBH_IRQ_MASK (1<<10) /* USB 1.1 host */ +#define ADC_IRQ_MASK (1<<16) +#define USB_DMA_IRQ_MASK (1<<26) /* USB DMA */ +#define ECC_IRQ_MASK (1<<27) + +#define DAI_RX_IRQ_MASK I2SR_IRQ_MASK +#define DAI_TX_IRQ_MASK I2ST_IRQ_MASK -#define TIMER0_IRQ_MASK (1<<6) -#define ADC_IRQ_MASK (1<<16) +#define USB_DMA_IRQ_MASK (1<<26) /* USB DMA */ #define IEN (*(volatile unsigned long *)0x80000100) #define CREQ (*(volatile unsigned long *)0x80000104) @@ -160,4 +179,83 @@ #define NFC_IREQ (*(volatile unsigned long *)0x90000060) #define NFC_RST (*(volatile unsigned long *)0x90000064) + +/* ECC controller */ + +#define ECC_CTRL (*(volatile unsigned long *)0x80000900) + #define ECC_DMA_REQ (1<<28) + #define ECC_ENC (1<<27) /* MLC ECC3/4 */ + #define ECC_FLG (1<<26) + #define ECC_IEN (1<<25) + #define ECC_MANUAL (1<<22) + #define ECC_WCNT (1<<12) /* [21:12] */ + #define ECC_HOLD (1<<7) + #define ECC_M4EN (1<<6) + #define ECC_ZERO (1<<5) + #define ECC_M3EN (1<<4) + #define ECC_CNT_MASK (7<<1) + #define ECC_CNT (1<<1) + #define ECC_SLC (1<<0) + +#define ECC_BASE (*(volatile unsigned long *)0x80000904) +#define ECC_MASK (*(volatile unsigned long *)0x80000908) +#define ECC_CLR (*(volatile unsigned long *)0x8000090c) +#define SLC_ECC0 (*(volatile unsigned long *)0x80000910) +#define SLC_ECC1 (*(volatile unsigned long *)0x80000914) +#define SLC_ECC2 (*(volatile unsigned long *)0x80000918) +#define SLC_ECC3 (*(volatile unsigned long *)0x8000091c) +#define SLC_ECC4 (*(volatile unsigned long *)0x80000920) +#define SLC_ECC5 (*(volatile unsigned long *)0x80000924) +#define SLC_ECC6 (*(volatile unsigned long *)0x80000928) +#define SLC_ECC7 (*(volatile unsigned long *)0x8000092c) +#define MLC_ECC0W (*(volatile unsigned long *)0x80000930) +#define MLC_ECC1W (*(volatile unsigned long *)0x80000934) +#define MLC_ECC2W (*(volatile unsigned long *)0x80000938) +#define MLC_ECC0R (*(volatile unsigned long *)0x80000940) +#define MLC_ECC1R (*(volatile unsigned long *)0x80000944) +#define MLC_ECC2R (*(volatile unsigned long *)0x80000948) +#define ECC_CORR_START (*(volatile unsigned long *)0x8000094c) +#define ECC_ERRADDR1 (*(volatile unsigned long *)0x80000950) +#define ECC_ERRADDR2 (*(volatile unsigned long *)0x80000954) +#define ECC_ERRADDR3 (*(volatile unsigned long *)0x80000958) +#define ECC_ERRADDR4 (*(volatile unsigned long *)0x8000095c) +#define ECC_ERRDATA1 (*(volatile unsigned long *)0x80000960) +#define ECC_ERRDATA2 (*(volatile unsigned long *)0x80000964) +#define ECC_ERRDATA3 (*(volatile unsigned long *)0x80000968) +#define ECC_ERRDATA4 (*(volatile unsigned long *)0x8000096c) +#define ECC_ERR_NUM (*(volatile unsigned long *)0x80000970) + +#define ECC_ERRDATA(x) (*(volatile unsigned long *)(0x80000960 + (x) * 4)) +#define ECC_ERRADDR(x) (*(volatile unsigned long *)(0x80000950 + (x) * 4)) + +/* Digital Audio Interface */ +#define DADI_L0 (*(volatile unsigned long *)0x80000000) +#define DADI_R0 (*(volatile unsigned long *)0x80000004) +#define DADI_L1 (*(volatile unsigned long *)0x80000008) +#define DADI_R1 (*(volatile unsigned long *)0x8000000C) +#define DADI_L2 (*(volatile unsigned long *)0x80000010) +#define DADI_R2 (*(volatile unsigned long *)0x80000014) +#define DADI_L3 (*(volatile unsigned long *)0x80000018) +#define DADI_R3 (*(volatile unsigned long *)0x8000001c) + +#define DADO_L0 (*(volatile unsigned long *)0x80000020) +#define DADO_R0 (*(volatile unsigned long *)0x80000024) +#define DADO_L1 (*(volatile unsigned long *)0x80000028) +#define DADO_R1 (*(volatile unsigned long *)0x8000002C) +#define DADO_L2 (*(volatile unsigned long *)0x80000030) +#define DADO_R2 (*(volatile unsigned long *)0x80000034) +#define DADO_L3 (*(volatile unsigned long *)0x80000038) +#define DADO_R3 (*(volatile unsigned long *)0x8000003c) + +#define DAMR (*(volatile unsigned long *)0x80000040) +#define DAVC (*(volatile unsigned long *)0x80000044) + +#define DADI_L(x) (*(volatile unsigned long *)(0x80000000 + (x) * 8)) +#define DADI_R(x) (*(volatile unsigned long *)(0x80000004 + (x) * 8)) +#define DADO_L(x) (*(volatile unsigned long *)(0x80000020 + (x) * 8)) +#define DADO_R(x) (*(volatile unsigned long *)(0x80000024 + (x) * 8)) + +/* USB 2.0 device system MMR base address */ +#define USB_BASE 0x90000b00 + #endif diff --git a/firmware/export/usb-tcc7xx.h b/firmware/export/usb-tcc7xx.h new file mode 100644 index 0000000000..dc091ad671 --- /dev/null +++ b/firmware/export/usb-tcc7xx.h @@ -0,0 +1,104 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2008 Vitja Makarov + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef USB_TCC7XX_H +#define USB_TCC7XX_H + +#define MMR_REG16(base, x) (*(volatile unsigned short *) ((base) + (x))) + +/* USB PHY registers */ +#define TCC7xx_USB_PHY_CFG MMR_REG16(USB_BASE, 0xc4) + #define TCC7xx_USB_PHY_CFG_XSEL (1<<13) /* FS/HS Transceiver enable */ + #define TCC7xx_USB_PHY_CFG_DWS (1<<6) /* Host mode */ + #define TCC7xx_USB_PHY_XO (1<<5) /* Enable XO_OUT */ + #define TCC7xx_USB_PHY_CKSEL_12 0 + #define TCC7xx_USB_PHY_CKSEL_24 1 + #define TCC7xx_USB_PHY_CKSEL_48 2 + +/* USB 2.0 device registers */ +#define TCC7xx_USB_INDEX MMR_REG16(USB_BASE, 0x00) /* Endpoint Index register */ +#define TCC7xx_USB_EPIF MMR_REG16(USB_BASE, 0x04) /* Endpoint interrupt flag register */ +#define TCC7xx_USB_EPIE MMR_REG16(USB_BASE, 0x08) /* Endpoint interrupt enable register */ +#define TCC7xx_USB_FUNC MMR_REG16(USB_BASE, 0x0c) /* Function address register */ +#define TCC7xx_USB_EP_DIR MMR_REG16(USB_BASE, 0x14) /* Endpoint direction register */ +#define TCC7xx_USB_TST MMR_REG16(USB_BASE, 0x14) /* Test registerregister */ +#define TCC7xx_USB_SYS_STAT MMR_REG16(USB_BASE, 0x1c) /* System status register */ + #define TCC7xx_USB_SYS_STAT_RESET (1<<0) /* Host forced reced */ + #define TCC7xx_USB_SYS_STAT_SUSPEND (1<<1) /* Host forced suspend */ + #define TCC7xx_USB_SYS_STAT_RESUME (1<<2) /* Host forced resume */ + #define TCC7xx_USB_SYS_STAT_HIGH (1<<4) /* High speed */ + #define TCC7xx_USB_SYS_STAT_VBON (1<<8) + #define TCC7xx_USB_SYS_STAT_VBOF (1<<9) + #define TCC7xx_USB_SYS_STAT_EOERR (1<<10) /* overrun error */ + #define TCC7xx_USB_SYS_STAT_DCERR (1<<11) /* Data CRC error */ + #define TCC7xx_USB_SYS_STAT_TCERR (1<<12) /* Token CRC error */ + #define TCC7xx_USB_SYS_STAT_BSERR (1<<13) /* Bit-stuff error */ + #define TCC7xx_USB_SYS_STAT_TMERR (1<<14) /* Timeout error */ + #define TCC7xx_USB_SYS_STAT_BAERR (1<<15) /* Byte align error */ + +#define TCC7xx_USB_SYS_STAT_ERRORS (TCC7xx_USB_SYS_STAT_EOERR | \ + TCC7xx_USB_SYS_STAT_DCERR | \ + TCC7xx_USB_SYS_STAT_TCERR | \ + TCC7xx_USB_SYS_STAT_BSERR | \ + TCC7xx_USB_SYS_STAT_TMERR | \ + TCC7xx_USB_SYS_STAT_BAERR) + +#define TCC7xx_USB_SYS_CTRL MMR_REG16(USB_BASE, 0x20) /* System control register */ + #define TCC7xx_USB_SYS_CTRL_RESET (1<<0) /* Reset enable */ + #define TCC7xx_USB_SYS_CTRL_SUSPEND (1<<1) /* Suspend enable */ + #define TCC7xx_USB_SYS_CTRL_RESUME (1<<2) /* Resume enable */ + #define TCC7xx_USB_SYS_CTRL_IPS (1<<4) /* Interrupt polarity */ + #define TCC7xx_USB_SYS_CTRL_RFRE (1<<5) /* Reverse read data enable */ + #define TCC7xx_USB_SYS_CTRL_SPDEN (1<<6) /* Speed detection interrupt enable */ + #define TCC7xx_USB_SYS_CTRL_BUS16 (1<<7) /* Select bus width 8/16 */ + #define TCC7xx_USB_SYS_CTRL_EIEN (1<<8) /* Error interrupt enable */ + #define TCC7xx_USB_SYS_CTRL_RWDE (1<<9) /* Reverse write data enable */ + #define TCC7xx_USB_SYS_CTRL_VBONE (1<<10) /* VBus On enable */ + #define TCC7xx_USB_SYS_CTRL_VBOFE (1<<11) /* VBus Off enable */ + #define TCC7xx_USB_SYS_CTRL_DUAL (1<<12) /* Dual interrupt enable*/ + #define TCC7xx_USB_SYS_CTRL_DMAZ (1<<14) /* DMA total count zero int */ + +#define TCC7xx_USB_EP0_STAT MMR_REG16(USB_BASE, 0x24) /* EP0 status register */ +#define TCC7xx_USB_EP0_CTRL MMR_REG16(USB_BASE, 0x28) /* EP0 control register */ + +#define TCC7xx_USB_EP0_BUF MMR_REG16(USB_BASE, 0x60) /* EP0 buffer register */ +#define TCC7xx_USB_EP1_BUF MMR_REG16(USB_BASE, 0x64) /* EP1 buffer register */ +#define TCC7xx_USB_EP2_BUF MMR_REG16(USB_BASE, 0x68) /* EP2 buffer register */ +#define TCC7xx_USB_EP3_BUF MMR_REG16(USB_BASE, 0x6c) /* EP3 buffer register */ + +/* Indexed registers, write endpoint number to TCC7xx_USB_INDEX */ +#define TCC7xx_USB_EP_STAT MMR_REG16(USB_BASE, 0x2c) /* EP status register */ +#define TCC7xx_USB_EP_CTRL MMR_REG16(USB_BASE, 0x30) /* EP control register */ + #define TCC7xx_USB_EP_CTRL_CDP (1 << 2) /* Clear Data PID */ + #define TCC7xx_USB_EP_CTRL_FLUSH (1 << 6) /* Flush FIFO */ +#define TCC7xx_USB_EP_BRCR MMR_REG16(USB_BASE, 0x34) /* EP byte read count register */ +#define TCC7xx_USB_EP_BWCR MMR_REG16(USB_BASE, 0x38) /* EP byte write count register */ +#define TCC7xx_USB_EP_MAXP MMR_REG16(USB_BASE, 0x3c) /* EP max packet register */ + +#define TCC7xx_USB_EP_DMA_CTRL MMR_REG16(USB_BASE, 0x40) /* EP DMA control register */ +#define TCC7xx_USB_EP_DMA_TCNTR MMR_REG16(USB_BASE, 0x44) /* EP DMA transfer counter register */ +#define TCC7xx_USB_EP_DMA_FCNTR MMR_REG16(USB_BASE, 0x48) /* EP DMA fifo counter register */ +#define TCC7xx_USB_EP_DMA_TTCNTR1 MMR_REG16(USB_BASE, 0x4c) /* EP DMA total trasfer counter1 register */ +#define TCC7xx_USB_EP_DMA_TTCNTR2 MMR_REG16(USB_BASE, 0x50) /* EP DMA total trasfer counter2 register */ +#define TCC7xx_USB_EP_DMA_ADDR1 MMR_REG16(USB_BASE, 0xa0) /* EP DMA MCU addr1 register */ +#define TCC7xx_USB_EP_DMA_ADDR2 MMR_REG16(USB_BASE, 0xa4) /* EP DMA MCU addr2 register */ +#define TCC7xx_USB_EP_DMA_STAT MMR_REG16(USB_BASE, 0xc0) /* EP DMA Transfer Status register */ +#define TCC7xx_USB_DELAY_CTRL MMR_REG16(USB_BASE, 0x80) /* Delay control register */ +#endif /* USB_TCC7XX_H */ -- cgit v1.2.3