From 152847977a420487d9c3728841101ef708e41373 Mon Sep 17 00:00:00 2001 From: Michael Sparmann Date: Sun, 2 Jan 2011 23:16:27 +0000 Subject: New port: iPod Classic (also known as iPod 6G/6.5G/7G) Major known issues: - No bootloader yet - No support for the first-generation 160GB CE-ATA hard disk drive yet - Audio playback is slow, only FLAC seems to reach realtime git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28953 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/audiohw.h | 2 + firmware/export/config/ipod6g.h | 246 ++++++++++++++++ firmware/export/cpu.h | 5 +- firmware/export/cs42l55.h | 481 ++++++++++++++++++++++++++++++ firmware/export/cscodec.h | 27 ++ firmware/export/i2c-s5l8702.h | 32 ++ firmware/export/s5l8702.h | 631 ++++++++++++++++++++++++++++++++++++++++ 7 files changed, 1423 insertions(+), 1 deletion(-) create mode 100644 firmware/export/config/ipod6g.h create mode 100644 firmware/export/cs42l55.h create mode 100644 firmware/export/cscodec.h create mode 100644 firmware/export/i2c-s5l8702.h create mode 100644 firmware/export/s5l8702.h (limited to 'firmware/export') diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h index 930c671c20..651c9cd254 100644 --- a/firmware/export/audiohw.h +++ b/firmware/export/audiohw.h @@ -68,6 +68,8 @@ #include "jz4740-codec.h" #elif defined(HAVE_AK4537) #include "ak4537.h" +#elif defined(HAVE_CS42L55) +#include "cs42l55.h" #endif #if (CONFIG_PLATFORM & PLATFORM_HOSTED) /* #include gives errors in other code areas, diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h new file mode 100644 index 0000000000..16cf9afcef --- /dev/null +++ b/firmware/export/config/ipod6g.h @@ -0,0 +1,246 @@ +/* + * This config file is for iPod 6G / Classic + */ +#define TARGET_TREE /* this target is using the target tree system */ + +#define IPOD_ARCH 1 + +/* For Rolo and boot loader */ +#define MODEL_NUMBER 71 + +#define MODEL_NAME "Apple iPod Classic/6G" + +/* define this if you use an ATA controller */ +#define CONFIG_STORAGE STORAGE_ATA + +#define HAVE_ATA_DMA +#define ATA_MAX_UDMA 4 +#define ATA_MAX_MWDMA 2 + +/* define this if the ATA controller and method of USB access support LBA48 */ +#define HAVE_LBA48 + +/* define this if you have recording possibility */ +//#define HAVE_RECORDING + +/* Define bitmask of input sources - recordable bitmask can be defined + explicitly if different */ +#define INPUT_SRC_CAPS (SRC_CAP_LINEIN) + +/* define the bitmask of hardware sample rates */ +#define HW_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \ + | SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \ + | SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8) + +/* define the bitmask of recording sample rates */ +#define REC_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \ + | SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \ + | SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8) + +/* define this if you have a bitmap LCD display */ +#define HAVE_LCD_BITMAP + +/* define this if you can flip your LCD */ +//#define HAVE_LCD_FLIP + +/* define this if you have a colour LCD */ +#define HAVE_LCD_COLOR + +/* define this if you want album art for this target */ +#define HAVE_ALBUMART + +/* define this to enable bitmap scaling */ +#define HAVE_BMP_SCALING + +/* define this to enable JPEG decoding */ +#define HAVE_JPEG + +/* define this if you can invert the colours on your LCD */ +//#define HAVE_LCD_INVERT + +/* LCD stays visible without backlight - simulator hint */ +#define HAVE_TRANSFLECTIVE_LCD + +/* define this if you have access to the quickscreen */ +#define HAVE_QUICKSCREEN + +/* define this if you have access to the pitchscreen */ +#define HAVE_PITCHSCREEN + +/* define this if you would like tagcache to build on this target */ +#define HAVE_TAGCACHE + +/* define this if the unit uses a scrollwheel for navigation */ +#define HAVE_SCROLLWHEEL +#define HAVE_WHEEL_ACCELERATION +#define WHEEL_ACCEL_START 270 +#define WHEEL_ACCELERATION 3 + +/* Define this if you can detect headphones */ +#define HAVE_HEADPHONE_DETECTION + +/* LCD dimensions */ +#define LCD_WIDTH 320 +#define LCD_HEIGHT 240 +#define LCD_DEPTH 16 /* pseudo 262.144 colors */ +#define LCD_PIXELFORMAT RGB565 /* rgb565 */ + +/* Define this if the LCD can shut down */ +#define HAVE_LCD_SHUTDOWN + +/* Define this if your LCD can be enabled/disabled */ +#define HAVE_LCD_ENABLE + +/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE + should be defined as well. */ +#ifndef BOOTLOADER +//TODO: #define HAVE_LCD_SLEEP +//TODO: #define HAVE_LCD_SLEEP_SETTING +#endif + +#define CONFIG_KEYPAD IPOD_4G_PAD + +//#define AB_REPEAT_ENABLE +//#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE + +/* Define this to enable morse code input */ +#define HAVE_MORSE_INPUT + +/* Define this if you do software codec */ +#define CONFIG_CODEC SWCODEC + +/* define this if you have a real-time clock */ +#define CONFIG_RTC RTC_NANO2G + +/* Define if the device can wake from an RTC alarm */ +//#define HAVE_RTC_ALARM + +#define CONFIG_LCD LCD_IPOD6G + +/* Define the type of audio codec */ +#define HAVE_CS42L55 + +#define HAVE_PCM_DMA_ADDRESS + +/* Define this for LCD backlight available */ +#define HAVE_BACKLIGHT +#define HAVE_BACKLIGHT_BRIGHTNESS + +/* Define this if you have a software controlled poweroff */ +#define HAVE_SW_POWEROFF + +/* The number of bytes reserved for loadable codecs */ +#define CODEC_SIZE 0x100000 + +/* The number of bytes reserved for loadable plugins */ +#define PLUGIN_BUFFER_SIZE 0x80000 + +// TODO: Figure out real values +#define BATTERY_CAPACITY_DEFAULT 400 /* default battery capacity */ +#define BATTERY_CAPACITY_MIN 300 /* min. capacity selectable */ +#define BATTERY_CAPACITY_MAX 500 /* max. capacity selectable */ +#define BATTERY_CAPACITY_INC 10 /* capacity increment */ +#define BATTERY_TYPES_COUNT 1 /* only one type */ + +/* Hardware controlled charging with monitoring */ +#define CONFIG_CHARGING CHARGING_MONITOR + +/* define current usage levels */ +//TODO: #define CURRENT_NORMAL 21 /* playback @48MHz clock, backlight off */ +//TODO: #define CURRENT_BACKLIGHT 23 /* maximum brightness */ + +/* define this if the unit can be powered or charged via USB */ +#define HAVE_USB_POWER + +/* Define this if your LCD can set contrast */ +//#define HAVE_LCD_CONTRAST + +/* Define Apple remote tuner */ +//#define CONFIG_TUNER IPOD_REMOTE_TUNER +//#define HAVE_RDS_CAP + +/* The exact type of CPU */ +#define CONFIG_CPU S5L8702 + +/* I2C interface */ +#define CONFIG_I2C I2C_S5L8702 + +#define HAVE_USB_CHARGING_ENABLE + +/* The size of the flash ROM */ +#define FLASH_SIZE 0x400000 + +/* Define this to the CPU frequency */ +//TODO: Figure out exact value +#define CPU_FREQ 216000000 + +/* define this if the hardware can be powered off while charging */ +#define HAVE_POWEROFF_WHILE_CHARGING + +/* Offset ( in the firmware file's header ) to the file CRC */ +#define FIRMWARE_OFFSET_FILE_CRC 0 + +/* Offset ( in the firmware file's header ) to the real data */ +#define FIRMWARE_OFFSET_FILE_DATA 8 + +/* Define this if you can read an absolute wheel position */ +#define HAVE_WHEEL_POSITION + +/* define this if the device has larger sectors when accessed via USB */ +/* (only relevant in disk.c, fat.c now always supports large virtual sectors) */ +#define MAX_LOG_SECTOR_SIZE 4096 + +/* define this if the hard drive uses large physical sectors (ATA-7 feature) */ +/* and doesn't handle them in the drive firmware */ +#define MAX_PHYS_SECTOR_SIZE 4096 + +/* Define this if you have adjustable CPU frequency */ +//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ + +#define BOOTFILE_EXT "ipod" +#define BOOTFILE "rockbox." BOOTFILE_EXT +#define BOOTDIR "/.rockbox" + +/* Alternative bootfile extension - this is for encrypted images */ +#define BOOTFILE_EXT2 "ipodx" + +/* Define this for FM radio input available */ +#define HAVE_FMRADIO_IN + +/** Port-specific settings **/ + +#if 0 +/* Main LCD contrast range and defaults */ +#define MIN_CONTRAST_SETTING 1 +#define MAX_CONTRAST_SETTING 30 +#define DEFAULT_CONTRAST_SETTING 19 /* Match boot contrast */ +#endif + +/* Main LCD backlight brightness range and defaults */ +#define MIN_BRIGHTNESS_SETTING 1 +#define MAX_BRIGHTNESS_SETTING 0x3f +#define DEFAULT_BRIGHTNESS_SETTING 0x20 + +/* USB defines */ +#define HAVE_USBSTACK +//#define HAVE_USB_HID_MOUSE - broken? +#define CONFIG_USBOTG USBOTG_S3C6400X +#define USB_VENDOR_ID 0x05AC +//TODO: This is still the Nano2G product ID. Figure out the real one. +#define USB_PRODUCT_ID 0x1260 +#define USB_NUM_ENDPOINTS 5 +#define USE_ROCKBOX_USB +#define USB_DEVBSS_ATTR __attribute__((aligned(16))) + +/* Define this if you can switch on/off the accessory power supply */ +#define HAVE_ACCESSORY_SUPPLY +//#define IPOD_ACCESSORY_PROTOCOL +//#define HAVE_SERIAL + +/* Define this, if you can switch on/off the lineout */ +#define HAVE_LINEOUT_POWEROFF + +#define USB_WRITE_BUFFER_SIZE (1024*64) + +/* Define this if a programmable hotkey is mapped */ +#define HAVE_HOTKEY diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h index 381830ab52..59d210380b 100644 --- a/firmware/export/cpu.h +++ b/firmware/export/cpu.h @@ -59,9 +59,12 @@ #ifdef CPU_TCC780X #include "tcc780x.h" #endif -#ifdef CPU_S5L870X +#if CONFIG_CPU == S5L8700 || CONFIG_CPU == S5L8701 #include "s5l8700.h" #endif +#if CONFIG_CPU == S5L8702 +#include "s5l8702.h" +#endif #if CONFIG_CPU == JZ4732 #include "jz4740.h" #endif diff --git a/firmware/export/cs42l55.h b/firmware/export/cs42l55.h new file mode 100644 index 0000000000..8a6640f7c2 --- /dev/null +++ b/firmware/export/cs42l55.h @@ -0,0 +1,481 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: wm8975.h 28159 2010-09-24 22:42:06Z Buschel $ + * + * Copyright (C) 2010 by Michael Sparmann + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#ifndef __CS42L55_H__ +#define __CS42L55_H__ + +/* volume/balance/treble/bass interdependency */ +#define VOLUME_MIN -580 +#define VOLUME_MAX 120 + +#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP) + +extern int tenthdb2master(int db); + +extern void audiohw_set_master_vol(int vol_l, int vol_r); +extern void audiohw_set_lineout_vol(int vol_l, int vol_r); +extern void audiohw_enable_lineout(bool enable); + +/* Register addresses and bits */ + +#define HIDDENCTL 0x00 +#define HIDDENCTL_LOCK 0x00 +#define HIDDENCTL_UNLOCK 0x99 + +#define CHIPVERSION 0x01 + +#define PWRCTL1 0x02 +#define PWRCTL1_PDN_CODEC (1 << 0) +#define PWRCTL1_PDN_ADCA (1 << 1) +#define PWRCTL1_PDN_ADCB (1 << 2) +#define PWRCTL1_PDN_CHRG (1 << 3) + +#define PWRCTL2 0x03 +#define PWRCTL2_PDN_LINA_MASK (3 << 0) +#define PWRCTL2_PDN_LINA_HIGH (0 << 0) +#define PWRCTL2_PDN_LINA_LOW (1 << 0) +#define PWRCTL2_PDN_LINA_NEVER (2 << 0) +#define PWRCTL2_PDN_LINA_ALWAYS (3 << 0) +#define PWRCTL2_PDN_LINB_MASK (3 << 2) +#define PWRCTL2_PDN_LINB_HIGH (0 << 2) +#define PWRCTL2_PDN_LINB_LOW (1 << 2) +#define PWRCTL2_PDN_LINB_NEVER (2 << 2) +#define PWRCTL2_PDN_LINB_ALWAYS (3 << 2) +#define PWRCTL2_PDN_HPA_MASK (3 << 4) +#define PWRCTL2_PDN_HPA_HIGH (0 << 4) +#define PWRCTL2_PDN_HPA_LOW (1 << 4) +#define PWRCTL2_PDN_HPA_NEVER (2 << 4) +#define PWRCTL2_PDN_HPA_ALWAYS (3 << 4) +#define PWRCTL2_PDN_HPB_MASK (3 << 6) +#define PWRCTL2_PDN_HPB_HIGH (0 << 6) +#define PWRCTL2_PDN_HPB_LOW (1 << 6) +#define PWRCTL2_PDN_HPB_NEVER (2 << 6) +#define PWRCTL2_PDN_HPB_ALWAYS (3 << 6) + +#define CLKCTL1 0x04 +#define CLKCTL1_MCLKDIS (1 << 0) +#define CLKCTL1_MCLKDIV2 (1 << 1) +#define CLKCTL1_SCLKMCLK_MASK (3 << 2) +#define CLKCTL1_SCLKMCLK_BURST (0 << 2) +#define CLKCTL1_SCLKMCLK_AFTER (2 << 2) +#define CLKCTL1_SCLKMCLK_BEFORE (3 << 2) +#define CLKCTL1_INV_SCLK (1 << 4) +#define CLKCTL1_MASTER (1 << 5) + +#define CLKCTL2 0x05 +#define CLKCTL2_MCLKLRCK_MASK (3 << 0) +#define CLKCTL2_MCLKLRCK_125 (1 << 0) +#define CLKCTL2_MCLKLRCK_136 (3 << 0) +#define CLKCTL2_32KGROUP (1 << 2) +#define CLKCTL2_SPEED_MASK (3 << 3) +#define CLKCTL2_SPEED_SINGLE (1 << 3) +#define CLKCTL2_SPEED_HALF (2 << 3) +#define CLKCTL2_SPEED_QUARTER (3 << 3) +#define CLKCTL2_8000HZ 0x1d +#define CLKCTL2_11025HZ 0x1b +#define CLKCTL2_12000HZ 0x19 +#define CLKCTL2_16000HZ 0x15 +#define CLKCTL2_22050HZ 0x13 +#define CLKCTL2_24000HZ 0x11 +#define CLKCTL2_32000HZ 0x0d +#define CLKCTL2_44100HZ 0x0b +#define CLKCTL2_48000HZ 0x09 + +#define CLSHCTL 0x06 +#define CLSHCTL_ADPTPWR_MASK (3 << 4) +#define CLSHCTL_ADPTPWR_VOLUME (0 << 4) +#define CLSHCTL_ADPTPWR_HALF (1 << 4) +#define CLSHCTL_ADPTPWR_FULL (2 << 4) +#define CLSHCTL_ADPTPWR_SIGNAL (3 << 4) + +#define MISCCTL 0x07 +#define MISCCTL_FREEZE (1 << 0) +#define MISCCTL_DIGSFT (1 << 2) +#define MISCCTL_ANLGZC (1 << 3) +#define MISCCTL_UNDOC4 (1 << 4) +#define MISCCTL_DIGMUX (1 << 7) + +#define ALHMUX 0x08 +#define ALHMUX_HPAMUX_MASK (1 << 0) +#define ALHMUX_HPAMUX_DACA (0 << 0) +#define ALHMUX_HPAMUX_PGAA (1 << 0) +#define ALHMUX_HPBMUX_MASK (1 << 1) +#define ALHMUX_HPBMUX_DACB (0 << 1) +#define ALHMUX_HPBMUX_PGAB (1 << 1) +#define ALHMUX_LINEAMUX_MASK (1 << 2) +#define ALHMUX_LINEAMUX_DACA (0 << 2) +#define ALHMUX_LINEAMUX_PGAA (1 << 2) +#define ALHMUX_LINEBMUX_MASK (1 << 3) +#define ALHMUX_LINEBMUX_DACB (0 << 3) +#define ALHMUX_LINEBMUX_PGAB (1 << 3) +#define ALHMUX_ADCAMUX_MASK (3 << 4) +#define ALHMUX_ADCAMUX_PGAA (0 << 4) +#define ALHMUX_ADCAMUX_AIN1A (1 << 4) +#define ALHMUX_ADCAMUX_AIN2A (2 << 4) +#define ALHMUX_ADCBMUX_MASK (3 << 4) +#define ALHMUX_ADCBMUX_PGAB (0 << 6) +#define ALHMUX_ADCBMUX_AIN1B (1 << 6) +#define ALHMUX_ADCBMUX_AIN2B (2 << 6) + +#define HPFCTL 0x09 +#define HPFCTL_HPFA_CF_MASK (3 << 0) +#define HPFCTL_HPFA_CF_1_8 (0 << 0) +#define HPFCTL_HPFA_CF_119 (1 << 0) +#define HPFCTL_HPFA_CF_236 (2 << 0) +#define HPFCTL_HPFA_CF_464 (3 << 0) +#define HPFCTL_HPFB_CF_MASK (3 << 2) +#define HPFCTL_HPFB_CF_1_8 (0 << 2) +#define HPFCTL_HPFB_CF_119 (1 << 2) +#define HPFCTL_HPFB_CF_236 (2 << 2) +#define HPFCTL_HPFB_CF_464 (3 << 2) +#define HPFCTL_HPFRZA (1 << 4) +#define HPFCTL_HPFA (1 << 5) +#define HPFCTL_HPFRZB (1 << 6) +#define HPFCTL_HPFB (1 << 7) + +#define ADCCTL 0x0a +#define ADCCTL_ADCAMUTE (1 << 0) +#define ADCCTL_ADCBMUTE (1 << 1) +#define ADCCTL_INV_ADCA (1 << 2) +#define ADCCTL_INV_ADCB (1 << 3) +#define ADCCTL_DIGSUM_MASK (3 << 4) +#define ADCCTL_DIGSUM_NORMAL (0 << 4) +#define ADCCTL_DIGSUM_HALFSUM (1 << 4) +#define ADCCTL_DIGSUM_HALFDIFF (2 << 4) +#define ADCCTL_DIGSUM_SWAPPED (3 << 4) +#define ADCCTL_PGA_VOLUME_GROUP (1 << 6) +#define ADCCTL_ADC_VOLUME_GROUP (1 << 7) + +#define PGAACTL 0x0b +#define PGAACTL_VOLUME_MASK (0x3f << 0) +#define PGAACTL_VOLUME_SHIFT 0 +#define PGAACTL_MUX_MASK (1 << 6) +#define PGAACTL_MUX_AIN1A (0 << 6) +#define PGAACTL_MUX_AIN2A (1 << 6) +#define PGAACTL_BOOST (1 << 7) + +#define PGABCTL 0x0c +#define PGABCTL_VOLUME_MASK (0x3f << 0) +#define PGABCTL_VOLUME_SHIFT 0 +#define PGABCTL_MUX_MASK (1 << 6) +#define PGABCTL_MUX_AIN1B (0 << 6) +#define PGABCTL_MUX_AIN2B (1 << 6) +#define PGABCTL_BOOST (1 << 7) + +#define ADCAATT 0x0d +#define ADCAATT_VOLUME_MASK (0xff << 0) +#define ADCAATT_VOLUME_SHIFT 0 + +#define ADCBATT 0x0e +#define ADCBATT_VOLUME_MASK (0xff << 0) +#define ADCBATT_VOLUME_SHIFT 0 + +#define PLAYCTL 0x0f +#define PLAYCTL_MSTAMUTE (1 << 0) +#define PLAYCTL_MSTBMUTE (1 << 1) +#define PLAYCTL_INV_PCMA (1 << 2) +#define PLAYCTL_INV_PCMB (1 << 3) +#define PLAYCTL_PB_VOLUME_GROUP (1 << 4) +#define PLAYCTL_DEEMPH (1 << 6) +#define PLAYCTL_PDN_DSP (1 << 7) + +#define AMIXACTL 0x10 +#define AMIXACTL_AMIXAVOL_MASK (0x7f << 0) +#define AMIXACTL_AMIXAVOL_SHIFT 0 +#define AMIXACTL_AMIXAMUTE (1 << 7) + +#define AMIXBCTL 0x11 +#define AMIXBCTL_AMIXBVOL_MASK (0x7f << 0) +#define AMIXBCTL_AMIXBVOL_SHIFT 0 +#define AMIXBCTL_AMIXBMUTE (1 << 7) + +#define PMIXACTL 0x12 +#define PMIXACTL_PMIXAVOL_MASK (0x7f << 0) +#define PMIXACTL_PMIXAVOL_SHIFT 0 +#define PMIXACTL_PMIXAMUTE (1 << 7) + +#define PMIXBCTL 0x13 +#define PMIXBCTL_PMIXBVOL_MASK (0x7f << 0) +#define PMIXBCTL_PMIXBVOL_SHIFT 0 +#define PMIXBCTL_PMIXBMUTE (1 << 7) + +#define BEEPFO 0x14 +#define BEEPFO_ONTIME_MASK (0xf << 0) +#define BEEPFO_ONTIME_86 (0x0 << 0) +#define BEEPFO_ONTIME_430 (0x1 << 0) +#define BEEPFO_ONTIME_780 (0x2 << 0) +#define BEEPFO_ONTIME_1200 (0x3 << 0) +#define BEEPFO_ONTIME_1500 (0x4 << 0) +#define BEEPFO_ONTIME_1800 (0x5 << 0) +#define BEEPFO_ONTIME_2200 (0x6 << 0) +#define BEEPFO_ONTIME_2500 (0x7 << 0) +#define BEEPFO_ONTIME_2800 (0x8 << 0) +#define BEEPFO_ONTIME_3200 (0x9 << 0) +#define BEEPFO_ONTIME_3500 (0xa << 0) +#define BEEPFO_ONTIME_3800 (0xb << 0) +#define BEEPFO_ONTIME_4200 (0xc << 0) +#define BEEPFO_ONTIME_4500 (0xd << 0) +#define BEEPFO_ONTIME_4800 (0xe << 0) +#define BEEPFO_ONTIME_5200 (0xf << 0) +#define BEEPFO_FREQ_MASK (0xf << 4) +#define BEEPFO_FREQ_254_76 (0x0 << 4) +#define BEEPFO_FREQ_509_51 (0x1 << 4) +#define BEEPFO_FREQ_571_65 (0x2 << 4) +#define BEEPFO_FREQ_651_04 (0x3 << 4) +#define BEEPFO_FREQ_689_34 (0x4 << 4) +#define BEEPFO_FREQ_756_04 (0x5 << 4) +#define BEEPFO_FREQ_869_45 (0x6 << 4) +#define BEEPFO_FREQ_976_56 (0x7 << 4) +#define BEEPFO_FREQ_1019_02 (0x8 << 4) +#define BEEPFO_FREQ_1171_88 (0x9 << 4) +#define BEEPFO_FREQ_1302_08 (0xa << 4) +#define BEEPFO_FREQ_1378_67 (0xb << 4) +#define BEEPFO_FREQ_1562_50 (0xc << 4) +#define BEEPFO_FREQ_1674_11 (0xd << 4) +#define BEEPFO_FREQ_1953_13 (0xe << 4) +#define BEEPFO_FREQ_2130_68 (0xf << 4) + +#define BEEPVO 0x15 +#define BEEPVO_VOLUME_MASK (0x1f << 0) +#define BEEPVO_VOLUME_SHIFT 0 +#define BEEPVO_OFFTIME_MASK (7 << 5) +#define BEEPVO_OFFTIME_1230 (0 << 5) +#define BEEPVO_OFFTIME_2580 (1 << 5) +#define BEEPVO_OFFTIME_3900 (2 << 5) +#define BEEPVO_OFFTIME_5200 (3 << 5) +#define BEEPVO_OFFTIME_6600 (4 << 5) +#define BEEPVO_OFFTIME_8050 (5 << 5) +#define BEEPVO_OFFTIME_9350 (6 << 5) +#define BEEPVO_OFFTIME_10800 (7 << 5) + +#define BTCTL 0x16 +#define BTCTL_TCEN (1 << 0) +#define BTCTL_BASSCF_MASK (3 << 1) +#define BTCTL_BASSCF_50 (0 << 1) +#define BTCTL_BASSCF_100 (1 << 1) +#define BTCTL_BASSCF_200 (2 << 1) +#define BTCTL_BASSCF_250 (3 << 1) +#define BTCTL_TREBCF_MASK (3 << 3) +#define BTCTL_TREBCF_5000 (0 << 3) +#define BTCTL_TREBCF_7000 (1 << 3) +#define BTCTL_TREBCF_10000 (2 << 3) +#define BTCTL_TREBCF_15000 (3 << 3) +#define BTCTL_BEEP_MASK (0 << 6) +#define BTCTL_BEEP_OFF (0 << 6) +#define BTCTL_BEEP_SINGLE (1 << 6) +#define BTCTL_BEEP_MULTIPLE (2 << 6) +#define BTCTL_BEEP_CONTINUOUS (3 << 6) + +#define TONECTL 0x17 +#define TONECTL_BASS_MASK (0xf << 0) +#define TONECTL_BASS_SHIFT 0 +#define TONECTL_TREB_MASK (0xf << 4) +#define TONECTL_TREB_SHIFT 4 + +#define MSTAVOL 0x18 +#define MSTAVOL_VOLUME_MASK (0xff << 0) +#define MSTAVOL_VOLUME_SHIFT 0 + +#define MSTBVOL 0x19 +#define MSTBVOL_VOLUME_MASK (0xff << 0) +#define MSTBVOL_VOLUME_SHIFT 0 + +#define HPACTL 0x1a +#define HPACTL_HPAVOL_MASK (0x7f << 0) +#define HPACTL_HPAVOL_SHIFT 0 +#define HPACTL_HPAMUTE (1 << 7) + +#define HPBCTL 0x1b +#define HPBCTL_HPBVOL_MASK (0x7f << 0) +#define HPBCTL_HPBVOL_SHIFT 0 +#define HPBCTL_HPBMUTE (1 << 7) + +#define LINEACTL 0x1c +#define LINEACTL_LINEAVOL_MASK (0x7f << 0) +#define LINEACTL_LINEAVOL_SHIFT 0 +#define LINEACTL_LINEAMUTE (1 << 7) + +#define LINEBCTL 0x1d +#define LINEBCTL_LINEBVOL_MASK (0x7f << 0) +#define LINEBCTL_LINEBVOL_SHIFT 0 +#define LINEBCTL_LINEBMUTE (1 << 7) + +#define AINADV 0x1e +#define AINADV_VOLUME_MASK (0xff << 0) +#define AINADV_VOLUME_SHIFT 0 + +#define DINADV 0x1f +#define DINADV_VOLUME_MASK (0xff << 0) +#define DINADV_VOLUME_SHIFT 0 + +#define MIXCTL 0x20 +#define MIXCTL_ADCASWP_MASK (3 << 0) +#define MIXCTL_ADCASWP_NORMAL (0 << 0) +#define MIXCTL_ADCASWP_HALFSUM (1 << 0) +#define MIXCTL_ADCASWP_HALFSUM2 (2 << 0) +#define MIXCTL_ADCASWP_SWAPPED (3 << 0) +#define MIXCTL_ADCBSWP_MASK (3 << 2) +#define MIXCTL_ADCBSWP_NORMAL (0 << 2) +#define MIXCTL_ADCBSWP_HALFSUM (1 << 2) +#define MIXCTL_ADCBSWP_HALFSUM2 (2 << 2) +#define MIXCTL_ADCBSWP_SWAPPED (3 << 2) +#define MIXCTL_PCMASWP_MASK (3 << 4) +#define MIXCTL_PCMASWP_NORMAL (0 << 4) +#define MIXCTL_PCMASWP_HALFSUM (1 << 4) +#define MIXCTL_PCMASWP_HALFSUM2 (2 << 4) +#define MIXCTL_PCMASWP_SWAPPED (3 << 4) +#define MIXCTL_PCMBSWP_MASK (3 << 6) +#define MIXCTL_PCMBSWP_NORMAL (0 << 6) +#define MIXCTL_PCMBSWP_HALFSUM (1 << 6) +#define MIXCTL_PCMBSWP_HALFSUM2 (2 << 6) +#define MIXCTL_PCMBSWP_SWAPPED (3 << 6) + +#define LIMCTL1 0x21 +#define LIMCTL1_CUSH_MASK (7 << 2) +#define LIMCTL1_CUSH_0 (0 << 2) +#define LIMCTL1_CUSH_3 (1 << 2) +#define LIMCTL1_CUSH_6 (2 << 2) +#define LIMCTL1_CUSH_9 (3 << 2) +#define LIMCTL1_CUSH_12 (4 << 2) +#define LIMCTL1_CUSH_18 (5 << 2) +#define LIMCTL1_CUSH_24 (6 << 2) +#define LIMCTL1_CUSH_30 (7 << 2) +#define LIMCTL1_LMAX_MASK (7 << 5) +#define LIMCTL1_LMAX_0 (0 << 5) +#define LIMCTL1_LMAX_3 (1 << 5) +#define LIMCTL1_LMAX_6 (2 << 5) +#define LIMCTL1_LMAX_9 (3 << 5) +#define LIMCTL1_LMAX_12 (4 << 5) +#define LIMCTL1_LMAX_18 (5 << 5) +#define LIMCTL1_LMAX_24 (6 << 5) +#define LIMCTL1_LMAX_30 (7 << 5) + +#define LIMCTL2 0x22 +#define LIMCTL2_LIMRRATE_MASK (0x3f << 0) +#define LIMCTL2_LIMRRATE_SHIFT 0 +#define LIMCTL2_LIMIT_ALL (1 << 6) +#define LIMCTL2_LIMIT (1 << 7) + +#define LIMCTL3 0x23 +#define LIMCTL3_LIMARATE_MASK (0x3f << 0) +#define LIMCTL3_LIMARATE_SHIFT 0 + +#define ALCCTL1 0x24 +#define ALCCTL1_ALCARATE_MASK (0x3f << 0) +#define ALCCTL1_ALCARATE_SHIFT 0 +#define ALCCTL1_ALCA (1 << 6) +#define ALCCTL1_ALCB (1 << 7) + +#define ALCCTL2 0x25 +#define ALCCTL2_ALCRRATE_MASK (0x3f << 0) +#define ALCCTL2_ALCRRATE_SHIFT 0 + +#define ALCCTL3 0x26 +#define ALCCTL3_ALCMIN_MASK (7 << 2) +#define ALCCTL3_ALCMIN_0 (0 << 2) +#define ALCCTL3_ALCMIN_3 (1 << 2) +#define ALCCTL3_ALCMIN_6 (2 << 2) +#define ALCCTL3_ALCMIN_9 (3 << 2) +#define ALCCTL3_ALCMIN_12 (4 << 2) +#define ALCCTL3_ALCMIN_18 (5 << 2) +#define ALCCTL3_ALCMIN_24 (6 << 2) +#define ALCCTL3_ALCMIN_30 (7 << 2) +#define ALCCTL3_ALCMAX_MASK (7 << 5) +#define ALCCTL3_ALCMAX_0 (0 << 5) +#define ALCCTL3_ALCMAX_3 (1 << 5) +#define ALCCTL3_ALCMAX_6 (2 << 5) +#define ALCCTL3_ALCMAX_9 (3 << 5) +#define ALCCTL3_ALCMAX_12 (4 << 5) +#define ALCCTL3_ALCMAX_18 (5 << 5) +#define ALCCTL3_ALCMAX_24 (6 << 5) +#define ALCCTL3_ALCMAX_30 (7 << 5) + +#define NGCTL 0x27 +#define NGCTL_NGDELEAY_MASK (3 << 0) +#define NGCTL_NGDELEAY_50 (0 << 0) +#define NGCTL_NGDELEAY_100 (1 << 0) +#define NGCTL_NGDELEAY_150 (2 << 0) +#define NGCTL_NGDELEAY_200 (3 << 0) +#define NGCTL_THRESH_MASK (7 << 2) +#define NGCTL_THRESH_SHIFT 2 +#define NGCTL_NG_BOOST30 (1 << 5) +#define NGCTL_NG (1 << 6) +#define NGCTL_NGALL (1 << 7) + +#define ALSZDIS 0x28 +#define ALSZDIS_LIMSRDIS (1 << 3) +#define ALSZDIS_ALCAZCDIS (1 << 4) +#define ALSZDIS_ALCASRDIS (1 << 5) +#define ALSZDIS_ALCBZCDIS (1 << 6) +#define ALSZDIS_ALCBSRDIS (1 << 7) + +#define STATUS 0x29 +#define STATUS_ADCAOVFL (1 << 0) +#define STATUS_ADCBOVFL (1 << 1) +#define STATUS_MIXAOVFL (1 << 2) +#define STATUS_MIXBOVFL (1 << 3) +#define STATUS_DSPAOVFL (1 << 4) +#define STATUS_DSPBOVFL (1 << 5) +#define STATUS_SPCLKERR (1 << 6) +#define STATUS_HPDETECT (1 << 7) + +#define CPCTL 0x2a +#define CPCTL_CHGFREQ_MASK (0xf << 0) +#define CPCTL_CHGFREQ_SHIFT 0 + +#define HIDDEN2E 0x2e +#define HIDDEN2E_DEFAULT 0x30 + +#define HIDDEN32 0x32 +#define HIDDEN32_DEFAULT 0x07 + +#define HIDDEN33 0x33 +#define HIDDEN33_DEFAULT 0xff + +#define HIDDEN34 0x34 +#define HIDDEN34_DEFAULT 0xf8 + +#define HIDDEN35 0x35 +#define HIDDEN35_DEFAULT 0xdc + +#define HIDDEN36 0x36 +#define HIDDEN36_DEFAULT 0xfc + +#define HIDDEN37 0x37 +#define HIDDEN37_DEFAULT 0xac + +#define HIDDEN3A 0x3a +#define HIDDEN3A_DEFAULT 0xf8 + +#define HIDDEN3C 0x3c +#define HIDDEN3C_DEFAULT 0xd3 + +#define HIDDEN3D 0x3d +#define HIDDEN3D_DEFAULT 0x23 + +#define HIDDEN3E 0x3e +#define HIDDEN3E_DEFAULT 0x81 + +#define HIDDEN3F 0x3f +#define HIDDEN3F_DEFAULT 0x46 + + +#endif /* __CS42L55_H__ */ diff --git a/firmware/export/cscodec.h b/firmware/export/cscodec.h new file mode 100644 index 0000000000..dcf6c30e06 --- /dev/null +++ b/firmware/export/cscodec.h @@ -0,0 +1,27 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: wmcodec.h 17847 2008-06-28 18:10:04Z bagder $ + * + * Copyright (C) 2006 by Marcoen Hirschberg + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +unsigned char cscodec_read(int reg); +void cscodec_write(int reg, unsigned char data); +void cscodec_power(bool state); +void cscodec_clock(bool state); +void cscodec_reset(bool state); + diff --git a/firmware/export/i2c-s5l8702.h b/firmware/export/i2c-s5l8702.h new file mode 100644 index 0000000000..02dc40d89e --- /dev/null +++ b/firmware/export/i2c-s5l8702.h @@ -0,0 +1,32 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: i2c-s5l8700.h 21533 2009-06-27 20:11:11Z bertrik $ + * + * Copyright (C) 2009 by Bertrik Sikken + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#ifndef _I2C_S5l8702_H +#define _I2C_S5l8702_H + +#include "config.h" + +void i2c_init(void); +int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data); +int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data); + +#endif /* _I2C_S5l8702_H */ + diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h new file mode 100644 index 0000000000..9c7b7e1662 --- /dev/null +++ b/firmware/export/s5l8702.h @@ -0,0 +1,631 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: s5l8700.h 28791 2010-12-11 09:39:33Z Buschel $ + * + * Copyright (C) 2008 by Marcoen Hirschberg, Bart van Adrichem + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#ifndef __S5L8702_H__ +#define __S5L8702_H__ + +#include + +#define REG8_PTR_T volatile uint8_t * +#define REG16_PTR_T volatile uint16_t * +#define REG32_PTR_T volatile uint32_t * + +//TODO: Figure out +#define TIMER_FREQ (1843200 * 4 * 26 / 1 / 4) /* 47923200 Hz */ + +#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */ + +#define DRAM_ORIG 0x08000000 +#define IRAM_ORIG 0 + +#define DRAM_SIZE (MEMORYSIZE * 0x100000) +#define IRAM_SIZE 0x40000 + +#define TTB_SIZE 0x4000 +#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) + +/////SYSCON///// +#define CLKCON0C (*((uint32_t volatile*)(0x3C50000C))) +#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \ + + ((i) == 4 ? 0x6C : \ + ((i) == 3 ? 0x68 : \ + ((i) == 2 ? 0x58 : \ + ((i) == 1 ? 0x4C : \ + 0x48))))))) + + +/////TIMER///// +#define TACON (*((uint32_t volatile*)(0x3C700000))) +#define TACMD (*((uint32_t volatile*)(0x3C700004))) +#define TADATA0 (*((uint32_t volatile*)(0x3C700008))) +#define TADATA1 (*((uint32_t volatile*)(0x3C70000C))) +#define TAPRE (*((uint32_t volatile*)(0x3C700010))) +#define TACNT (*((uint32_t volatile*)(0x3C700014))) +#define TBCON (*((uint32_t volatile*)(0x3C700020))) +#define TBCMD (*((uint32_t volatile*)(0x3C700024))) +#define TBDATA0 (*((uint32_t volatile*)(0x3C700028))) +#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C))) +#define TBPRE (*((uint32_t volatile*)(0x3C700030))) +#define TBCNT (*((uint32_t volatile*)(0x3C700034))) +#define TCCON (*((uint32_t volatile*)(0x3C700040))) +#define TCCMD (*((uint32_t volatile*)(0x3C700044))) +#define TCDATA0 (*((uint32_t volatile*)(0x3C700048))) +#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C))) +#define TCPRE (*((uint32_t volatile*)(0x3C700050))) +#define TCCNT (*((uint32_t volatile*)(0x3C700054))) +#define TDCON (*((uint32_t volatile*)(0x3C700060))) +#define TDCMD (*((uint32_t volatile*)(0x3C700064))) +#define TDDATA0 (*((uint32_t volatile*)(0x3C700068))) +#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C))) +#define TDPRE (*((uint32_t volatile*)(0x3C700070))) +#define TDCNT (*((uint32_t volatile*)(0x3C700074))) +#define TECON (*((uint32_t volatile*)(0x3C7000A0))) +#define TECMD (*((uint32_t volatile*)(0x3C7000A4))) +#define TEDATA0 (*((uint32_t volatile*)(0x3C7000A8))) +#define TEDATA1 (*((uint32_t volatile*)(0x3C7000AC))) +#define TEPRE (*((uint32_t volatile*)(0x3C7000B0))) +#define TECNT (*((uint32_t volatile*)(0x3C7000B4))) +#define TFCON (*((uint32_t volatile*)(0x3C7000C0))) +#define TFCMD (*((uint32_t volatile*)(0x3C7000C4))) +#define TFDATA0 (*((uint32_t volatile*)(0x3C7000C8))) +#define TFDATA1 (*((uint32_t volatile*)(0x3C7000CC))) +#define TFPRE (*((uint32_t volatile*)(0x3C7000D0))) +#define TFCNT (*((uint32_t volatile*)(0x3C7000D4))) +#define TGCON (*((uint32_t volatile*)(0x3C7000E0))) +#define TGCMD (*((uint32_t volatile*)(0x3C7000E4))) +#define TGDATA0 (*((uint32_t volatile*)(0x3C7000E8))) +#define TGDATA1 (*((uint32_t volatile*)(0x3C7000EC))) +#define TGPRE (*((uint32_t volatile*)(0x3C7000F0))) +#define TGCNT (*((uint32_t volatile*)(0x3C7000F4))) +#define THCON (*((uint32_t volatile*)(0x3C700100))) +#define THCMD (*((uint32_t volatile*)(0x3C700104))) +#define THDATA0 (*((uint32_t volatile*)(0x3C700108))) +#define THDATA1 (*((uint32_t volatile*)(0x3C70010C))) +#define THPRE (*((uint32_t volatile*)(0x3C700110))) +#define THCNT (*((uint32_t volatile*)(0x3C700114))) +#define USEC_TIMER TFCNT + + +/////USB///// +#define OTGBASE 0x38400000 +#define PHYBASE 0x3C400000 +#define SYNOPSYSOTG_CLOCK 0 +#define SYNOPSYSOTG_AHBCFG 0x2B + + +/////I2C///// +#define IICCON(bus) (*((uint32_t volatile*)(0x3C600000 + 0x300000 * (bus)))) +#define IICSTAT(bus) (*((uint32_t volatile*)(0x3C600004 + 0x300000 * (bus)))) +#define IICADD(bus) (*((uint32_t volatile*)(0x3C600008 + 0x300000 * (bus)))) +#define IICDS(bus) (*((uint32_t volatile*)(0x3C60000C + 0x300000 * (bus)))) + + +/////INTERRUPT CONTROLLERS///// +#define VICIRQSTATUS(v) (*((uint32_t volatile*)(0x38E00000 + 0x1000 * (v)))) +#define VICFIQSTATUS(v) (*((uint32_t volatile*)(0x38E00004 + 0x1000 * (v)))) +#define VICRAWINTR(v) (*((uint32_t volatile*)(0x38E00008 + 0x1000 * (v)))) +#define VICINTSELECT(v) (*((uint32_t volatile*)(0x38E0000C + 0x1000 * (v)))) +#define VICINTENABLE(v) (*((uint32_t volatile*)(0x38E00010 + 0x1000 * (v)))) +#define VICINTENCLEAR(v) (*((uint32_t volatile*)(0x38E00014 + 0x1000 * (v)))) +#define VICSOFTINT(v) (*((uint32_t volatile*)(0x38E00018 + 0x1000 * (v)))) +#define VICSOFTINTCLEAR(v) (*((uint32_t volatile*)(0x38E0001C + 0x1000 * (v)))) +#define VICPROTECTION(v) (*((uint32_t volatile*)(0x38E00020 + 0x1000 * (v)))) +#define VICSWPRIORITYMASK(v) (*((uint32_t volatile*)(0x38E00024 + 0x1000 * (v)))) +#define VICPRIORITYDAISY(v) (*((uint32_t volatile*)(0x38E00028 + 0x1000 * (v)))) +#define VICVECTADDR(v, i) (*((uint32_t volatile*)(0x38E00100 + 0x1000 * (v) + 4 * (i)))) +#define VICVECTPRIORITY(v, i) (*((uint32_t volatile*)(0x38E00200 + 0x1000 * (v) + 4 * (i)))) +#define VICADDRESS(v) (*((const void* volatile*)(0x38E00F00 + 0x1000 * (v)))) +#define VIC0IRQSTATUS (*((uint32_t volatile*)(0x38E00000))) +#define VIC0FIQSTATUS (*((uint32_t volatile*)(0x38E00004))) +#define VIC0RAWINTR (*((uint32_t volatile*)(0x38E00008))) +#define VIC0INTSELECT (*((uint32_t volatile*)(0x38E0000C))) +#define VIC0INTENABLE (*((uint32_t volatile*)(0x38E00010))) +#define VIC0INTENCLEAR (*((uint32_t volatile*)(0x38E00014))) +#define VIC0SOFTINT (*((uint32_t volatile*)(0x38E00018))) +#define VIC0SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0001C))) +#define VIC0PROTECTION (*((uint32_t volatile*)(0x38E00020))) +#define VIC0SWPRIORITYMASK (*((uint32_t volatile*)(0x38E00024))) +#define VIC0PRIORITYDAISY (*((uint32_t volatile*)(0x38E00028))) +#define VIC0VECTADDR(i) (*((const void* volatile*)(0x38E00100 + 4 * (i)))) +#define VIC0VECTADDR0 (*((const void* volatile*)(0x38E00100))) +#define VIC0VECTADDR1 (*((const void* volatile*)(0x38E00104))) +#define VIC0VECTADDR2 (*((const void* volatile*)(0x38E00108))) +#define VIC0VECTADDR3 (*((const void* volatile*)(0x38E0010C))) +#define VIC0VECTADDR4 (*((const void* volatile*)(0x38E00110))) +#define VIC0VECTADDR5 (*((const void* volatile*)(0x38E00114))) +#define VIC0VECTADDR6 (*((const void* volatile*)(0x38E00118))) +#define VIC0VECTADDR7 (*((const void* volatile*)(0x38E0011C))) +#define VIC0VECTADDR8 (*((const void* volatile*)(0x38E00120))) +#define VIC0VECTADDR9 (*((const void* volatile*)(0x38E00124))) +#define VIC0VECTADDR10 (*((const void* volatile*)(0x38E00128))) +#define VIC0VECTADDR11 (*((const void* volatile*)(0x38E0012C))) +#define VIC0VECTADDR12 (*((const void* volatile*)(0x38E00130))) +#define VIC0VECTADDR13 (*((const void* volatile*)(0x38E00134))) +#define VIC0VECTADDR14 (*((const void* volatile*)(0x38E00138))) +#define VIC0VECTADDR15 (*((const void* volatile*)(0x38E0013C))) +#define VIC0VECTADDR16 (*((const void* volatile*)(0x38E00140))) +#define VIC0VECTADDR17 (*((const void* volatile*)(0x38E00144))) +#define VIC0VECTADDR18 (*((const void* volatile*)(0x38E00148))) +#define VIC0VECTADDR19 (*((const void* volatile*)(0x38E0014C))) +#define VIC0VECTADDR20 (*((const void* volatile*)(0x38E00150))) +#define VIC0VECTADDR21 (*((const void* volatile*)(0x38E00154))) +#define VIC0VECTADDR22 (*((const void* volatile*)(0x38E00158))) +#define VIC0VECTADDR23 (*((const void* volatile*)(0x38E0015C))) +#define VIC0VECTADDR24 (*((const void* volatile*)(0x38E00160))) +#define VIC0VECTADDR25 (*((const void* volatile*)(0x38E00164))) +#define VIC0VECTADDR26 (*((const void* volatile*)(0x38E00168))) +#define VIC0VECTADDR27 (*((const void* volatile*)(0x38E0016C))) +#define VIC0VECTADDR28 (*((const void* volatile*)(0x38E00170))) +#define VIC0VECTADDR29 (*((const void* volatile*)(0x38E00174))) +#define VIC0VECTADDR30 (*((const void* volatile*)(0x38E00178))) +#define VIC0VECTADDR31 (*((const void* volatile*)(0x38E0017C))) +#define VIC0VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E00200 + 4 * (i)))) +#define VIC0VECTPRIORITY0 (*((uint32_t volatile*)(0x38E00200))) +#define VIC0VECTPRIORITY1 (*((uint32_t volatile*)(0x38E00204))) +#define VIC0VECTPRIORITY2 (*((uint32_t volatile*)(0x38E00208))) +#define VIC0VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0020C))) +#define VIC0VECTPRIORITY4 (*((uint32_t volatile*)(0x38E00210))) +#define VIC0VECTPRIORITY5 (*((uint32_t volatile*)(0x38E00214))) +#define VIC0VECTPRIORITY6 (*((uint32_t volatile*)(0x38E00218))) +#define VIC0VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0021C))) +#define VIC0VECTPRIORITY8 (*((uint32_t volatile*)(0x38E00220))) +#define VIC0VECTPRIORITY9 (*((uint32_t volatile*)(0x38E00224))) +#define VIC0VECTPRIORITY10 (*((uint32_t volatile*)(0x38E00228))) +#define VIC0VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0022C))) +#define VIC0VECTPRIORITY12 (*((uint32_t volatile*)(0x38E00230))) +#define VIC0VECTPRIORITY13 (*((uint32_t volatile*)(0x38E00234))) +#define VIC0VECTPRIORITY14 (*((uint32_t volatile*)(0x38E00238))) +#define VIC0VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0023C))) +#define VIC0VECTPRIORITY16 (*((uint32_t volatile*)(0x38E00240))) +#define VIC0VECTPRIORITY17 (*((uint32_t volatile*)(0x38E00244))) +#define VIC0VECTPRIORITY18 (*((uint32_t volatile*)(0x38E00248))) +#define VIC0VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0024C))) +#define VIC0VECTPRIORITY20 (*((uint32_t volatile*)(0x38E00250))) +#define VIC0VECTPRIORITY21 (*((uint32_t volatile*)(0x38E00254))) +#define VIC0VECTPRIORITY22 (*((uint32_t volatile*)(0x38E00258))) +#define VIC0VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0025C))) +#define VIC0VECTPRIORITY24 (*((uint32_t volatile*)(0x38E00260))) +#define VIC0VECTPRIORITY25 (*((uint32_t volatile*)(0x38E00264))) +#define VIC0VECTPRIORITY26 (*((uint32_t volatile*)(0x38E00268))) +#define VIC0VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0026C))) +#define VIC0VECTPRIORITY28 (*((uint32_t volatile*)(0x38E00270))) +#define VIC0VECTPRIORITY29 (*((uint32_t volatile*)(0x38E00274))) +#define VIC0VECTPRIORITY30 (*((uint32_t volatile*)(0x38E00278))) +#define VIC0VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0027C))) +#define VIC0ADDRESS (*((void* volatile*)(0x38E00F00))) +#define VIC1IRQSTATUS (*((uint32_t volatile*)(0x38E01000))) +#define VIC1FIQSTATUS (*((uint32_t volatile*)(0x38E01004))) +#define VIC1RAWINTR (*((uint32_t volatile*)(0x38E01008))) +#define VIC1INTSELECT (*((uint32_t volatile*)(0x38E0100C))) +#define VIC1INTENABLE (*((uint32_t volatile*)(0x38E01010))) +#define VIC1INTENCLEAR (*((uint32_t volatile*)(0x38E01014))) +#define VIC1SOFTINT (*((uint32_t volatile*)(0x38E01018))) +#define VIC1SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0101C))) +#define VIC1PROTECTION (*((uint32_t volatile*)(0x38E01020))) +#define VIC1SWPRIORITYMASK (*((uint32_t volatile*)(0x38E01024))) +#define VIC1PRIORITYDAISY (*((uint32_t volatile*)(0x38E01028))) +#define VIC1VECTADDR(i) (*((const void* volatile*)(0x38E01100 + 4 * (i)))) +#define VIC1VECTADDR0 (*((const void* volatile*)(0x38E01100))) +#define VIC1VECTADDR1 (*((const void* volatile*)(0x38E01104))) +#define VIC1VECTADDR2 (*((const void* volatile*)(0x38E01108))) +#define VIC1VECTADDR3 (*((const void* volatile*)(0x38E0110C))) +#define VIC1VECTADDR4 (*((const void* volatile*)(0x38E01110))) +#define VIC1VECTADDR5 (*((const void* volatile*)(0x38E01114))) +#define VIC1VECTADDR6 (*((const void* volatile*)(0x38E01118))) +#define VIC1VECTADDR7 (*((const void* volatile*)(0x38E0111C))) +#define VIC1VECTADDR8 (*((const void* volatile*)(0x38E01120))) +#define VIC1VECTADDR9 (*((const void* volatile*)(0x38E01124))) +#define VIC1VECTADDR10 (*((const void* volatile*)(0x38E01128))) +#define VIC1VECTADDR11 (*((const void* volatile*)(0x38E0112C))) +#define VIC1VECTADDR12 (*((const void* volatile*)(0x38E01130))) +#define VIC1VECTADDR13 (*((const void* volatile*)(0x38E01134))) +#define VIC1VECTADDR14 (*((const void* volatile*)(0x38E01138))) +#define VIC1VECTADDR15 (*((const void* volatile*)(0x38E0113C))) +#define VIC1VECTADDR16 (*((const void* volatile*)(0x38E01140))) +#define VIC1VECTADDR17 (*((const void* volatile*)(0x38E01144))) +#define VIC1VECTADDR18 (*((const void* volatile*)(0x38E01148))) +#define VIC1VECTADDR19 (*((const void* volatile*)(0x38E0114C))) +#define VIC1VECTADDR20 (*((const void* volatile*)(0x38E01150))) +#define VIC1VECTADDR21 (*((const void* volatile*)(0x38E01154))) +#define VIC1VECTADDR22 (*((const void* volatile*)(0x38E01158))) +#define VIC1VECTADDR23 (*((const void* volatile*)(0x38E0115C))) +#define VIC1VECTADDR24 (*((const void* volatile*)(0x38E01160))) +#define VIC1VECTADDR25 (*((const void* volatile*)(0x38E01164))) +#define VIC1VECTADDR26 (*((const void* volatile*)(0x38E01168))) +#define VIC1VECTADDR27 (*((const void* volatile*)(0x38E0116C))) +#define VIC1VECTADDR28 (*((const void* volatile*)(0x38E01170))) +#define VIC1VECTADDR29 (*((const void* volatile*)(0x38E01174))) +#define VIC1VECTADDR30 (*((const void* volatile*)(0x38E01178))) +#define VIC1VECTADDR31 (*((const void* volatile*)(0x38E0117C))) +#define VIC1VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E01200 + 4 * (i)))) +#define VIC1VECTPRIORITY0 (*((uint32_t volatile*)(0x38E01200))) +#define VIC1VECTPRIORITY1 (*((uint32_t volatile*)(0x38E01204))) +#define VIC1VECTPRIORITY2 (*((uint32_t volatile*)(0x38E01208))) +#define VIC1VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0120C))) +#define VIC1VECTPRIORITY4 (*((uint32_t volatile*)(0x38E01210))) +#define VIC1VECTPRIORITY5 (*((uint32_t volatile*)(0x38E01214))) +#define VIC1VECTPRIORITY6 (*((uint32_t volatile*)(0x38E01218))) +#define VIC1VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0121C))) +#define VIC1VECTPRIORITY8 (*((uint32_t volatile*)(0x38E01220))) +#define VIC1VECTPRIORITY9 (*((uint32_t volatile*)(0x38E01224))) +#define VIC1VECTPRIORITY10 (*((uint32_t volatile*)(0x38E01228))) +#define VIC1VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0122C))) +#define VIC1VECTPRIORITY12 (*((uint32_t volatile*)(0x38E01230))) +#define VIC1VECTPRIORITY13 (*((uint32_t volatile*)(0x38E01234))) +#define VIC1VECTPRIORITY14 (*((uint32_t volatile*)(0x38E01238))) +#define VIC1VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0123C))) +#define VIC1VECTPRIORITY16 (*((uint32_t volatile*)(0x38E01240))) +#define VIC1VECTPRIORITY17 (*((uint32_t volatile*)(0x38E01244))) +#define VIC1VECTPRIORITY18 (*((uint32_t volatile*)(0x38E01248))) +#define VIC1VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0124C))) +#define VIC1VECTPRIORITY20 (*((uint32_t volatile*)(0x38E01250))) +#define VIC1VECTPRIORITY21 (*((uint32_t volatile*)(0x38E01254))) +#define VIC1VECTPRIORITY22 (*((uint32_t volatile*)(0x38E01258))) +#define VIC1VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0125C))) +#define VIC1VECTPRIORITY24 (*((uint32_t volatile*)(0x38E01260))) +#define VIC1VECTPRIORITY25 (*((uint32_t volatile*)(0x38E01264))) +#define VIC1VECTPRIORITY26 (*((uint32_t volatile*)(0x38E01268))) +#define VIC1VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0126C))) +#define VIC1VECTPRIORITY28 (*((uint32_t volatile*)(0x38E01270))) +#define VIC1VECTPRIORITY29 (*((uint32_t volatile*)(0x38E01274))) +#define VIC1VECTPRIORITY30 (*((uint32_t volatile*)(0x38E01278))) +#define VIC1VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0127C))) +#define VIC1ADDRESS (*((void* volatile*)(0x38E01F00))) + + +/////GPIO///// +#define PCON(i) (*((uint32_t volatile*)(0x3cf00000 + ((i) << 5)))) +#define PDAT(i) (*((uint32_t volatile*)(0x3cf00004 + ((i) << 5)))) +#define PUNA(i) (*((uint32_t volatile*)(0x3cf00008 + ((i) << 5)))) +#define PUNB(i) (*((uint32_t volatile*)(0x3cf0000c + ((i) << 5)))) +#define PCON0 (*((uint32_t volatile*)(0x3cf00000))) +#define PDAT0 (*((uint32_t volatile*)(0x3cf00004))) +#define PCON1 (*((uint32_t volatile*)(0x3cf00020))) +#define PDAT1 (*((uint32_t volatile*)(0x3cf00024))) +#define PCON2 (*((uint32_t volatile*)(0x3cf00040))) +#define PDAT2 (*((uint32_t volatile*)(0x3cf00044))) +#define PCON3 (*((uint32_t volatile*)(0x3cf00060))) +#define PDAT3 (*((uint32_t volatile*)(0x3cf00064))) +#define PCON4 (*((uint32_t volatile*)(0x3cf00080))) +#define PDAT4 (*((uint32_t volatile*)(0x3cf00084))) +#define PCON5 (*((uint32_t volatile*)(0x3cf000a0))) +#define PDAT5 (*((uint32_t volatile*)(0x3cf000a4))) +#define PCON6 (*((uint32_t volatile*)(0x3cf000c0))) +#define PDAT6 (*((uint32_t volatile*)(0x3cf000c4))) +#define PCON7 (*((uint32_t volatile*)(0x3cf000e0))) +#define PDAT7 (*((uint32_t volatile*)(0x3cf000e4))) +#define PCON8 (*((uint32_t volatile*)(0x3cf00100))) +#define PDAT8 (*((uint32_t volatile*)(0x3cf00104))) +#define PCON9 (*((uint32_t volatile*)(0x3cf00120))) +#define PDAT9 (*((uint32_t volatile*)(0x3cf00124))) +#define PCONA (*((uint32_t volatile*)(0x3cf00140))) +#define PDATA (*((uint32_t volatile*)(0x3cf00144))) +#define PCONB (*((uint32_t volatile*)(0x3cf00160))) +#define PDATB (*((uint32_t volatile*)(0x3cf00164))) +#define PCONC (*((uint32_t volatile*)(0x3cf00180))) +#define PDATC (*((uint32_t volatile*)(0x3cf00184))) +#define PCOND (*((uint32_t volatile*)(0x3cf001a0))) +#define PDATD (*((uint32_t volatile*)(0x3cf001a4))) +#define PCONE (*((uint32_t volatile*)(0x3cf001c0))) +#define PDATE (*((uint32_t volatile*)(0x3cf001c4))) +#define PCONF (*((uint32_t volatile*)(0x3cf001e0))) +#define PDATF (*((uint32_t volatile*)(0x3cf001e4))) +#define GPIOCMD (*((uint32_t volatile*)(0x3cf00200))) + + +/////SPI///// +#define SPIBASE(i) ((i) == 2 ? 0x3d200000 : \ + (i) == 1 ? 0x3ce00000 : \ + 0x3c300000) +#define SPICLKGATE(i) ((i) == 2 ? 0x2f : \ + (i) == 1 ? 0x2b : \ + 0x22) +#define SPIDMA(i) ((i) == 2 ? 0xd : \ + (i) == 1 ? 0xf : \ + 0x5) +#define SPICTRL(i) (*((uint32_t volatile*)(SPIBASE(i)))) +#define SPISETUP(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x4))) +#define SPISTATUS(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x8))) +#define SPIUNKREG1(i) (*((uint32_t volatile*)(SPIBASE(i) + 0xc))) +#define SPITXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x10))) +#define SPIRXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x20))) +#define SPICLKDIV(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x30))) +#define SPIRXLIMIT(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x34))) +#define SPIUNKREG3(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x38))) + + +/////AES///// +#define AESCONTROL (*((uint32_t volatile*)(0x38c00000))) +#define AESGO (*((uint32_t volatile*)(0x38c00004))) +#define AESUNKREG0 (*((uint32_t volatile*)(0x38c00008))) +#define AESSTATUS (*((uint32_t volatile*)(0x38c0000c))) +#define AESUNKREG1 (*((uint32_t volatile*)(0x38c00010))) +#define AESKEYLEN (*((uint32_t volatile*)(0x38c00014))) +#define AESOUTSIZE (*((uint32_t volatile*)(0x38c00018))) +#define AESOUTADDR (*((void* volatile*)(0x38c00020))) +#define AESINSIZE (*((uint32_t volatile*)(0x38c00024))) +#define AESINADDR (*((const void* volatile*)(0x38c00028))) +#define AESAUXSIZE (*((uint32_t volatile*)(0x38c0002c))) +#define AESAUXADDR (*((void* volatile*)(0x38c00030))) +#define AESSIZE3 (*((uint32_t volatile*)(0x38c00034))) +#define AESKEY ((uint32_t volatile*)(0x38c0004c)) +#define AESTYPE (*((uint32_t volatile*)(0x38c0006c))) +#define AESIV ((uint32_t volatile*)(0x38c00074)) +#define AESTYPE2 (*((uint32_t volatile*)(0x38c00088))) +#define AESUNKREG2 (*((uint32_t volatile*)(0x38c0008c))) + + +/////SHA1///// +#define SHA1CONFIG (*((uint32_t volatile*)(0x38000000))) +#define SHA1RESET (*((uint32_t volatile*)(0x38000004))) +#define SHA1RESULT ((uint32_t volatile*)(0x38000020)) +#define SHA1DATAIN ((uint32_t volatile*)(0x38000040)) + + +/////DMA///// +#ifndef ASM +struct dma_lli +{ + const void* srcaddr; + void* dstaddr; + const struct dma_lli* nextlli; + uint32_t control; +}; +#endif +#define DMACINTSTS(d) (*((uint32_t volatile*)(0x38200000 + 0x1700000 * (d)))) +#define DMACINTTCSTS(d) (*((uint32_t volatile*)(0x38200004 + 0x1700000 * (d)))) +#define DMACINTTCCLR(d) (*((uint32_t volatile*)(0x38200008 + 0x1700000 * (d)))) +#define DMACINTERRSTS(d) (*((uint32_t volatile*)(0x3820000c + 0x1700000 * (d)))) +#define DMACINTERRCLR(d) (*((uint32_t volatile*)(0x38200010 + 0x1700000 * (d)))) +#define DMACRAWINTTCSTS(d) (*((uint32_t volatile*)(0x38200014 + 0x1700000 * (d)))) +#define DMACRAWINTERRSTS(d) (*((uint32_t volatile*)(0x38200018 + 0x1700000 * (d)))) +#define DMACENABLEDCHANS(d) (*((uint32_t volatile*)(0x3820001c + 0x1700000 * (d)))) +#define DMACSOFTBREQ(d) (*((uint32_t volatile*)(0x38200020 + 0x1700000 * (d)))) +#define DMACSOFTSREQ(d) (*((uint32_t volatile*)(0x38200024 + 0x1700000 * (d)))) +#define DMACSOFTLBREQ(d) (*((uint32_t volatile*)(0x38200028 + 0x1700000 * (d)))) +#define DMACSOFTLSREQ(d) (*((uint32_t volatile*)(0x3820002c + 0x1700000 * (d)))) +#define DMACCONFIG(d) (*((uint32_t volatile*)(0x38200030 + 0x1700000 * (d)))) +#define DMACSYNC(d) (*((uint32_t volatile*)(0x38200034 + 0x1700000 * (d)))) +#define DMACCLLI(d, c) (*((struct dma_lli volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c)))) +#define DMACCSRCADDR(d, c) (*((const void* volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c)))) +#define DMACCDESTADDR(d, c) (*((void* volatile*)(0x38200104 + 0x1700000 * (d) + 0x20 * (c)))) +#define DMACCNEXTLLI(d, c) (*((const void* volatile*)(0x38200108 + 0x1700000 * (d) + 0x20 * (c)))) +#define DMACCCONTROL(d, c) (*((uint32_t volatile*)(0x3820010c + 0x1700000 * (d) + 0x20 * (c)))) +#define DMACCCONFIG(d, c) (*((uint32_t volatile*)(0x38200110 + 0x1700000 * (d) + 0x20 * (c)))) +#define DMAC0INTSTS (*((uint32_t volatile*)(0x38200000))) +#define DMAC0INTTCSTS (*((uint32_t volatile*)(0x38200004))) +#define DMAC0INTTCCLR (*((uint32_t volatile*)(0x38200008))) +#define DMAC0INTERRSTS (*((uint32_t volatile*)(0x3820000c))) +#define DMAC0INTERRCLR (*((uint32_t volatile*)(0x38200010))) +#define DMAC0RAWINTTCSTS (*((uint32_t volatile*)(0x38200014))) +#define DMAC0RAWINTERRSTS (*((uint32_t volatile*)(0x38200018))) +#define DMAC0ENABLEDCHANS (*((uint32_t volatile*)(0x3820001c))) +#define DMAC0SOFTBREQ (*((uint32_t volatile*)(0x38200020))) +#define DMAC0SOFTSREQ (*((uint32_t volatile*)(0x38200024))) +#define DMAC0SOFTLBREQ (*((uint32_t volatile*)(0x38200028))) +#define DMAC0SOFTLSREQ (*((uint32_t volatile*)(0x3820002c))) +#define DMAC0CONFIG (*((uint32_t volatile*)(0x38200030))) +#define DMAC0SYNC (*((uint32_t volatile*)(0x38200034))) +#define DMAC0CLLI(c) (*((struct dma_lli volatile*)(0x38200100 + 0x20 * (c)))) +#define DMAC0CSRCADDR(c) (*((const void* volatile*)(0x38200100 + 0x20 * (c)))) +#define DMAC0CDESTADDR(c) (*((void* volatile*)(0x38200104 + 0x20 * (c)))) +#define DMAC0CNEXTLLI(c) (*((const void* volatile*)(0x38200108 + 0x20 * (c)))) +#define DMAC0CCONTROL(c) (*((uint32_t volatile*)(0x3820010c + 0x20 * (c)))) +#define DMAC0CCONFIG(c) (*((uint32_t volatile*)(0x38200110 + 0x20 * (c)))) +#define DMAC0C0LLI (*((struct dma_lli volatile*)(0x38200100))) +#define DMAC0C0SRCADDR (*((const void* volatile*)(0x38200100))) +#define DMAC0C0DESTADDR (*((void* volatile*)(0x38200104))) +#define DMAC0C0NEXTLLI (*((const struct dma_lli* volatile*)(0x38200108))) +#define DMAC0C0CONTROL (*((uint32_t volatile*)(0x3820010c))) +#define DMAC0C0CONFIG (*((uint32_t volatile*)(0x38200110))) +#define DMAC0C1LLI (*((struct dma_lli volatile*)(0x38200120))) +#define DMAC0C1SRCADDR (*((const void* volatile*)(0x38200120))) +#define DMAC0C1DESTADDR (*((void* volatile*)(0x38200124))) +#define DMAC0C1NEXTLLI (*((const struct dma_lli* volatile*)(0x38200128))) +#define DMAC0C1CONTROL (*((uint32_t volatile*)(0x3820012c))) +#define DMAC0C1CONFIG (*((uint32_t volatile*)(0x38200130))) +#define DMAC0C2LLI (*((struct dma_lli volatile*)(0x38200140))) +#define DMAC0C2SRCADDR (*((const void* volatile*)(0x38200140))) +#define DMAC0C2DESTADDR (*((void* volatile*)(0x38200144))) +#define DMAC0C2NEXTLLI (*((const struct dma_lli* volatile*)(0x38200148))) +#define DMAC0C2CONTROL (*((uint32_t volatile*)(0x3820014c))) +#define DMAC0C2CONFIG (*((uint32_t volatile*)(0x38200150))) +#define DMAC0C3LLI (*((struct dma_lli volatile*)(0x38200160))) +#define DMAC0C3SRCADDR (*((const void* volatile*)(0x38200160))) +#define DMAC0C3DESTADDR (*((void* volatile*)(0x38200164))) +#define DMAC0C3NEXTLLI (*((const struct dma_lli* volatile*)(0x38200168))) +#define DMAC0C3CONTROL (*((uint32_t volatile*)(0x3820016c))) +#define DMAC0C3CONFIG (*((uint32_t volatile*)(0x38200170))) +#define DMAC0C4LLI (*((struct dma_lli volatile*)(0x38200180))) +#define DMAC0C4SRCADDR (*((const void* volatile*)(0x38200180))) +#define DMAC0C4DESTADDR (*((void* volatile*)(0x38200184))) +#define DMAC0C4NEXTLLI (*((const struct dma_lli* volatile*)(0x38200188))) +#define DMAC0C4CONTROL (*((uint32_t volatile*)(0x3820018c))) +#define DMAC0C4CONFIG (*((uint32_t volatile*)(0x38200190))) +#define DMAC0C5LLI (*((struct dma_lli volatile*)(0x382001a0))) +#define DMAC0C5SRCADDR (*((const void* volatile*)(0x382001a0))) +#define DMAC0C5DESTADDR (*((void* volatile*)(0x382001a4))) +#define DMAC0C5NEXTLLI (*((const struct dma_lli* volatile*)(0x382001a8))) +#define DMAC0C5CONTROL (*((uint32_t volatile*)(0x382001ac))) +#define DMAC0C5CONFIG (*((uint32_t volatile*)(0x382001b0))) +#define DMAC0C6LLI (*((struct dma_lli volatile*)(0x382001c0))) +#define DMAC0C6SRCADDR (*((const void* volatile*)(0x382001c0))) +#define DMAC0C6DESTADDR (*((void* volatile*)(0x382001c4))) +#define DMAC0C6NEXTLLI (*((const struct dma_lli* volatile*)(0x382001c8))) +#define DMAC0C6CONTROL (*((uint32_t volatile*)(0x382001cc))) +#define DMAC0C6CONFIG (*((uint32_t volatile*)(0x382001d0))) +#define DMAC0C7LLI (*((struct dma_lli volatile*)(0x382001e0))) +#define DMAC0C7SRCADDR (*((const void* volatile*)(0x382001e0))) +#define DMAC0C7DESTADDR (*((void* volatile*)(0x382001e4))) +#define DMAC0C7NEXTLLI (*((const struct dma_lli* volatile*)(0x382001e8))) +#define DMAC0C7CONTROL (*((uint32_t volatile*)(0x382001ec))) +#define DMAC0C7CONFIG (*((uint32_t volatile*)(0x382001f0))) +#define DMAC1INTSTS (*((uint32_t volatile*)(0x39900000))) +#define DMAC1INTTCSTS (*((uint32_t volatile*)(0x39900004))) +#define DMAC1INTTCCLR (*((uint32_t volatile*)(0x39900008))) +#define DMAC1INTERRSTS (*((uint32_t volatile*)(0x3990000c))) +#define DMAC1INTERRCLR (*((uint32_t volatile*)(0x39900010))) +#define DMAC1RAWINTTCSTS (*((uint32_t volatile*)(0x39900014))) +#define DMAC1RAWINTERRSTS (*((uint32_t volatile*)(0x39900018))) +#define DMAC1ENABLEDCHANS (*((uint32_t volatile*)(0x3990001c))) +#define DMAC1SOFTBREQ (*((uint32_t volatile*)(0x39900020))) +#define DMAC1SOFTSREQ (*((uint32_t volatile*)(0x39900024))) +#define DMAC1SOFTLBREQ (*((uint32_t volatile*)(0x39900028))) +#define DMAC1SOFTLSREQ (*((uint32_t volatile*)(0x3990002c))) +#define DMAC1CONFIG (*((uint32_t volatile*)(0x39900030))) +#define DMAC1SYNC (*((uint32_t volatile*)(0x39900034))) +#define DMAC1CLLI(c) (*((struct dma_lli volatile*)(0x39900100 + 0x20 * (c)))) +#define DMAC1CSRCADDR(c) (*((const void* volatile*)(0x39900100 + 0x20 * (c)))) +#define DMAC1CDESTADDR(c) (*((void* volatile*)(0x39900104 + 0x20 * (c)))) +#define DMAC1CNEXTLLI(c) (*((const void* volatile*)(0x39900108 + 0x20 * (c)))) +#define DMAC1CCONTROL(c) (*((uint32_t volatile*)(0x3990010c + 0x20 * (c)))) +#define DMAC1CCONFIG(c) (*((uint32_t volatile*)(0x39900110 + 0x20 * (c)))) +#define DMAC1C0LLI (*((struct dma_lli volatile*)(0x39900100))) +#define DMAC1C0SRCADDR (*((const void* volatile*)(0x39900100))) +#define DMAC1C0DESTADDR (*((void* volatile*)(0x39900104))) +#define DMAC1C0NEXTLLI (*((const struct dma_lli* volatile*)(0x39900108))) +#define DMAC1C0CONTROL (*((uint32_t volatile*)(0x3990010c))) +#define DMAC1C0CONFIG (*((uint32_t volatile*)(0x39900110))) +#define DMAC1C1LLI (*((struct dma_lli volatile*)(0x39900120))) +#define DMAC1C1SRCADDR (*((const void* volatile*)(0x39900120))) +#define DMAC1C1DESTADDR (*((void* volatile*)(0x39900124))) +#define DMAC1C1NEXTLLI (*((const struct dma_lli* volatile*)(0x39900128))) +#define DMAC1C1CONTROL (*((uint32_t volatile*)(0x3990012c))) +#define DMAC1C1CONFIG (*((uint32_t volatile*)(0x39900130))) +#define DMAC1C2LLI (*((struct dma_lli volatile*)(0x39900140))) +#define DMAC1C2SRCADDR (*((const void* volatile*)(0x39900140))) +#define DMAC1C2DESTADDR (*((void* volatile*)(0x39900144))) +#define DMAC1C2NEXTLLI (*((const struct dma_lli* volatile*)(0x39900148))) +#define DMAC1C2CONTROL (*((uint32_t volatile*)(0x3990014c))) +#define DMAC1C2CONFIG (*((uint32_t volatile*)(0x39900150))) +#define DMAC1C3LLI (*((struct dma_lli volatile*)(0x39900160))) +#define DMAC1C3SRCADDR (*((const void* volatile*)(0x39900160))) +#define DMAC1C3DESTADDR (*((void* volatile*)(0x39900164))) +#define DMAC1C3NEXTLLI (*((volatile void**)(0x39900168))) +#define DMAC1C3CONTROL (*((uint32_t volatile*)(0x3990016c))) +#define DMAC1C3CONFIG (*((uint32_t volatile*)(0x39900170))) +#define DMAC1C4LLI (*((struct dma_lli volatile*)(0x39900180))) +#define DMAC1C4SRCADDR (*((const void* volatile*)(0x39900180))) +#define DMAC1C4DESTADDR (*((void* volatile*)(0x39900184))) +#define DMAC1C4NEXTLLI (*((const struct dma_lli* volatile*)(0x39900188))) +#define DMAC1C4CONTROL (*((uint32_t volatile*)(0x3990018c))) +#define DMAC1C4CONFIG (*((uint32_t volatile*)(0x39900190))) +#define DMAC1C5LLI (*((struct dma_lli volatile*)(0x399001a0))) +#define DMAC1C5SRCADDR (*((const void* volatile*)(0x399001a0))) +#define DMAC1C5DESTADDR (*((void* volatile*)(0x399001a4))) +#define DMAC1C5NEXTLLI (*((const struct dma_lli* volatile*)(0x399001a8))) +#define DMAC1C5CONTROL (*((uint32_t volatile*)(0x399001ac))) +#define DMAC1C5CONFIG (*((uint32_t volatile*)(0x399001b0))) +#define DMAC1C6LLI (*((struct dma_lli volatile*)(0x399001c0))) +#define DMAC1C6SRCADDR (*((const void* volatile*)(0x399001c0))) +#define DMAC1C6DESTADDR (*((void* volatile*)(0x399001c4))) +#define DMAC1C6NEXTLLI (*((const struct dma_lli* volatile*)(0x399001c8))) +#define DMAC1C6CONTROL (*((uint32_t volatile*)(0x399001cc))) +#define DMAC1C6CONFIG (*((uint32_t volatile*)(0x399001d0))) +#define DMAC1C7LLI (*((struct dma_lli volatile*)(0x399001e0))) +#define DMAC1C7SRCADDR (*((const void* volatile*)(0x399001e0))) +#define DMAC1C7DESTADDR (*((void* volatile*)(0x399001e4))) +#define DMAC1C7NEXTLLI (*((const struct dma_lli* volatile*)(0x399001e8))) +#define DMAC1C7CONTROL (*((uint32_t volatile*)(0x399001ec))) +#define DMAC1C7CONFIG (*((uint32_t volatile*)(0x399001f0))) + + +/////LCD///// +#define LCD_BASE (*((uint32_t volatile*)(0x38300000))) +#define LCD_WCMD (*((uint32_t volatile*)(0x38300004))) +#define LCD_STATUS (*((uint32_t volatile*)(0x3830001c))) +#define LCD_WDATA (*((uint32_t volatile*)(0x38300040))) + + +/////ATA///// +#define ATA_CCONTROL (*((uint32_t volatile*)(0x38700000))) +#define ATA_CSTATUS (*((uint32_t volatile*)(0x38700004))) +#define ATA_CCOMMAND (*((uint32_t volatile*)(0x38700008))) +#define ATA_SWRST (*((uint32_t volatile*)(0x3870000c))) +#define ATA_IRQ (*((uint32_t volatile*)(0x38700010))) +#define ATA_IRQ_MASK (*((uint32_t volatile*)(0x38700014))) +#define ATA_CFG (*((uint32_t volatile*)(0x38700018))) +#define ATA_MDMA_TIME (*((uint32_t volatile*)(0x38700028))) +#define ATA_PIO_TIME (*((uint32_t volatile*)(0x3870002c))) +#define ATA_UDMA_TIME (*((uint32_t volatile*)(0x38700030))) +#define ATA_XFR_NUM (*((uint32_t volatile*)(0x38700034))) +#define ATA_XFR_CNT (*((uint32_t volatile*)(0x38700038))) +#define ATA_TBUF_START (*((void* volatile*)(0x3870003c))) +#define ATA_TBUF_SIZE (*((uint32_t volatile*)(0x38700040))) +#define ATA_SBUF_START (*((void* volatile*)(0x38700044))) +#define ATA_SBUF_SIZE (*((uint32_t volatile*)(0x38700048))) +#define ATA_CADR_TBUF (*((void* volatile*)(0x3870004c))) +#define ATA_CADR_SBUF (*((void* volatile*)(0x38700050))) +#define ATA_DATA ((uint32_t volatile*)(0x38700054)) +#define ATA_ERROR ((uint32_t volatile*)(0x38700058)) +#define ATA_NSECTOR ((uint32_t volatile*)(0x3870005c)) +#define ATA_SECTOR ((uint32_t volatile*)(0x38700060)) +#define ATA_LCYL ((uint32_t volatile*)(0x38700064)) +#define ATA_HCYL ((uint32_t volatile*)(0x38700068)) +#define ATA_SELECT ((uint32_t volatile*)(0x3870006c)) +#define ATA_COMMAND ((uint32_t volatile*)(0x38700070)) +#define ATA_CONTROL ((uint32_t volatile*)(0x38700074)) +#define ATA_PIO_READY (*((uint32_t volatile*)(0x38700078))) +#define ATA_PIO_RDATA (*((uint32_t volatile*)(0x3870007c))) +#define ATA_BUS_FIFO_STATUS (*((uint32_t volatile*)(0x38700080))) +#define ATA_FIFO_STATUS (*((uint32_t volatile*)(0x38700084))) +#define ATA_DMA_ADDR (*((void* volatile*)(0x38700088))) + + +/////CLICKWHEEL///// +#define WHEEL00 (*((uint32_t volatile*)(0x3C200000))) +#define WHEEL04 (*((uint32_t volatile*)(0x3C200004))) +#define WHEEL08 (*((uint32_t volatile*)(0x3C200008))) +#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C))) +#define WHEEL10 (*((uint32_t volatile*)(0x3C200010))) +#define WHEELINT (*((uint32_t volatile*)(0x3C200014))) +#define WHEELRX (*((uint32_t volatile*)(0x3C200018))) +#define WHEELTX (*((uint32_t volatile*)(0x3C20001C))) + + +/////I2S///// +#define I2SCLKCON (*((volatile uint32_t*)(0x3CA00000))) +#define I2STXCON (*((volatile uint32_t*)(0x3CA00004))) +#define I2STXCOM (*((volatile uint32_t*)(0x3CA00008))) +#define I2STXDB0 (*((volatile uint32_t*)(0x3CA00010))) +#define I2SRXCON (*((volatile uint32_t*)(0x3CA00030))) +#define I2SRXCOM (*((volatile uint32_t*)(0x3CA00034))) +#define I2SRXDB (*((volatile uint32_t*)(0x3CA00038))) +#define I2SSTATUS (*((volatile uint32_t*)(0x3CA0003C))) +#define I2S40 (*((volatile uint32_t*)(0x3CA00040))) + + +/////CLOCK GATES///// +#define CLOCKGATE_USB_1 2 +#define CLOCKGATE_USB_2 35 + + +/////INTERRUPTS///// +#define IRQ_TIMER 8 +#define IRQ_USB_FUNC 19 +#define IRQ_DMAC(d) 16 + d +#define IRQ_DMAC0 16 +#define IRQ_DMAC1 17 +#define IRQ_WHEEL 23 +#define IRQ_ATA 29 + + +#endif -- cgit v1.2.3